AMOLED display technology has been rapidly developing in the direction of high refresh rate,large size,and low power consumption.With the continuous improvement of the refresh rate,the data flow received and processed by the driver IC increases sharply,which was a great challenge to the interface rate of the hardware circuit and the bandwidth of the data flow channel;At the same time,as the number of pixels processed by driver IC increases,the power consumption of the driver chip also increases exponentially.Therefore,it has important application value for the research of 120 Hz AMOLED digital drive circuit system architecture and low-power processing.In this thesis,for the AMOLED panel with a refresh rate of 120 Hz and a resolution of1080×2340,the digital system architecture in the display driver chip is proposed,and the hardware circuit of the automatic current limiting algorithm is designed.Firstly,the theory of AMOLED grayscale display is analyzed,and the data processing module architecture of the driving circuit and the realization method of system refresh rate switching are elaborated in detail.Secondly,according to the power consumption problem caused by high refresh,The current-limiting algorithm is a data processing algorithm proposed for the arrangement of the display panel,and its processing effect determines the display quality of the image and the power consumption of the circuit.the current limiting algorithm based on color space conversion is designed and improved,and the current limiting factor is introduced to effectively reduce the power consumption,while avoiding the color distortion caused by excessive current limiting.In this thesis,the algorithm is simulated and verified based on the Matlab platform,and the results show that compared with the NPC algorithm and the HCM algorithm,the resulting image processed by the proposed algorithm reduces the mean squared error by 24% and 13% respectively under the same display power consumption.Finally,it has lit up the screen successfully on the AMOLED panel arranged in RGBG.And the display effect was good.In this thesis,Verilog HDL language is used to design the improved current-limiting algorithm circuit and perform functional simulation under Testbench.The current limiting algorithm circuit mainly includes seven module circuits,including color information control arrangement module,average brightness information module,lookup table dynamic control module,current limit factor calculation module,dimming control processing module,data operation output module and register control module.In this thesis,the circuit function is verified using the VCS simulation platform,and the waveform and log results show that the functions of each circuit module are correct.Finally,the GDSII layout of the driver display chip with automatic current limiting function was successfully generated under the UMC40 nm process,and the design rule check and layout versus schematics was passed,and the manufacturer production standards was met. |