Font Size: a A A

The RTL Code For Parity Check Error Card Reader

Posted on:2014-06-21Degree:MasterType:Thesis
Country:ChinaCandidate:Z R LiuFull Text:PDF
GTID:2568304886486394Subject:Software engineering
Abstract/Summary:PDF Full Text Request
The card reader is designed to return each inverse bit of the data to the card,when communicate with the smart card.It is used to detect the function of the card error retransmission.Card readers on the market are in full compliance with the 7816 protocol.They will return the data in line with the the protocol standard format data after they return the data,even the data received is in wrong formats.A research and analysis of the communication protocol is done based on 7816 agreement to develop the architecture of the system and set up the various functional blocks of the parity error detection card reader.Some modules are included in the design.System control module is designed to control the clock and reset of the entire system.Address space allocation module is designed to control APB various sub-module internal registers in the register which is mapped to a specific address of the ARM internal space.GPIO module is used to achieve the card reader and card interaction VCC,RST and CLK.7816 code and decode module is the core communication based on the 7816 agreement between the card reader and card communication with character frame which provides connection to interface card and cpu processing interface.For the purpose of extending the use of the entire chip,USB interface is supported with the selection of FT245BM USB protocol conversion chip.A interactive interface module is designed to mount on the APB bus the FT245BM,with the selection of the ARM cortex-M3 series that intergrated security features of the SC 100 as the CPU core,the communication speed of the card reader is generally about 5MHz internal sub-module is only 30MHz sampling clock starting to mount in the sub-module on the AHB is a high demand for speed,and APB should give more consideration to the low power consumption,speed is not critical to sub-modules,based on this selection of the APB bus as the main interface module equipped with the bus,the completion of the entire chip RTL design,finished the 7816 module,GPIO modules and FT245BM chip interface module functional verification,and the entire system functional verification.
Keywords/Search Tags:Card reader, FPGA, 7816, RTL
PDF Full Text Request
Related items