| As processors get faster,the number and bandwidth of Peripheral Component Interconnet Express(PCIe)buses are increasing,making it increasingly difficult to complete verification.Therefore,reducing the time required for the validation part of the project to further improve the efficiency of the work has become a challenge for all the validation engineers.The main source of this topic during the internship company’s PCIe protocol based on the high-speed switch project.The PCIe protocol has the characteristics of high bandwidth,high bus frequency and high running speed,which is why it has been used in more and more network devices in recent years.The Universal Verification Methodology(UVM),which is also by far the most widely used validation methodology,provides a set of platform mechanisms and reusable components that play an important role in reducing validation time and completing validation coverage.Based on PCIe standard,the NT pattern design of high-speed switch is verified.Based on the systematic understanding of UVM verification methodology and System Verilog verification language,each part of the switch is verified.The Non Transparent Bring(NTB)pattern was designed based on a deep understanding of the PCIe protocol and the design language.The main part of the verification platform is agent,reference emodel,scoreboard,receiver＿monitor,send＿monitor and so on,which are optimized from three aspects.The first is the test case with separate platform configuration,which is convenient for verification and can adjust and change the initial configuration of the platform.Finally,the NT mode of high speed switch based on PCIe protocol is verified in the complete verification environment.The test cases are programmed after the function points are captured,and the data and run＿log logs and waveforms generated by the monitor and scoreboard are observed after simulation;the test scenario coverage points are further refined by the completeness of the coverage.Finally,the results of software simulation show that all the high-speed switches designed in this thesis accord with PCIe protocol,and the module coverage is 100% and the code coverage is 82.64%.And the tested design procedures all meet the design conditions,can carry out the next project. |
