The FPGA Design&Implementation Of High-speed DAC Based On The PCIE Bus

With the widely application of the data acquisition system and the big technicalgap between domestic and overseas research, developing a high-speed data acquisitionsystem with independent intellectual property rights becomes more and more urgent,this thesis depends on the background of the research of6GSPS sampling rate and1GHZ bandwidth of high speed data acquisition card. The main research of this paper isthe data storage and control of the high speed DAC (Data Acquisition Card) based onthe PCI Express bus.In hardware design, in order to improve the sampling rate of system, we use twoADC chips to achieve parallel time alternative sampling. In FPGA design, which isregarded as the main control module, we use VHDL to control FPGA by means ofmodular design. The logic design mainly includes the following parts: configuring theclock and ADC registers based on the SPI communication, Using FPGA internalresources MIG to implement DDR2SDRAM high-speed data access and read/writecontrol, adopting PCIe bus interface to accomplish the intercommunication betweenData acquisition card and PowerPC, utilizing Virtex5to generate PCIe endpoint blockplus IP core in order to shorten the development cycle and simplify the design process,performing the PCIe bus transmission based on the method of DMA which can reduceCPU utilization but achieve a higher transmission rate during the transmission.Combined with PCIe bus driver, we successfully implement the chip configurationfrom PowerPC to DAC based on the PCIe bus, and we also reach the performance ofAD sampling data transmission and storage from DAC to PowerPC, By using the toolsof Modelsim simulation software and ChipScope software which is used as FPGA innersignal detection to debug and verify the system function, we confirm the feasibility ofthe project design.