A Low Delay And High Speed Data Transmission System Based On PCIe And Optical Module

With the rapid development of injection infrared hardware-in-the-loop simulation technology,the injection hardware-in-the-loop simulation system has higher requirements for the system delay and the resolution,frame rate and gray level of infrared image.Therefore,as one of the key equipment in the HWIL system,the data transmission system needs to have high speed,low delay and long distance data transmission ability.In this paper,a data transmission system with high speed,low delay and long distance transmission is designed according to the requirement of the injection infrared hardware-inthe-loop simulation system.The data transmission system supports the upstream and downstream.Downstream: The sending card receives images of the image emulation computer and sends images to the injection card.The injection card injects the received images into the device.Upstream: The injection card collects control information of the device,then sends the control information to the sending card.The sending card sends received control information to the image emulation computer.The main work of this paper is shown as follows.Firstly,the research background and significance of low delay and high speed data transmission system are described,then the development situation at home and abroad is analyzed,the defects and deficiencies of various data transmission systems are showed,the system architecture of sending card and injection card is designed.The sending card is selected and the injection card is designed.Secondly,the logic design of main control chip FPGA in board card is carried out.The logical design consists of the following modules.PCIe high speed interface logic design,which is responsible for full duplex high speed data communication between sending card and emulation computer.Logic design of inter-panel optical fiber communication based on optical module,which is responsible for realizing full duplex optical fiber communication between sending card and injection card.Low delay image DDR3 cache logic design,which is responsible for the realization of high-speed low delay image cache between different logic modules in the downstream.Camera Link outputs a logical design that is responsible for injecting the image into the device under test by the injection card.Serial port acquisition logic design,which is responsible for injection card to collect the feedback control information of the device.Finally,the system is verified.The system verifies that the upload containing the uplink control information and the downlink images are correct.Through the field test of the injection hardware-in-the-loop simulation system of a certain institute,the closed-loop verification of the system can run,and the system meets the design requirements.