Integrated Circuit Test Data Storage And Analysis Software Design And Implementation

IC test system is an important tool to ensure the performance and quality of ICs in IC testing,in which IC test data storage and analysis software is an important part of the IC test system.The software has a large space requirement for storing test data and consumes a lot of time when analysing large volume STDF files.This thesis is an indepth study of IC test data storage and analysis software in this context.The IC test data storage and analysis software designed in this thesis is designed for ATE machines with a maximum of 255 Test Sites per Test Head,and can directly generate STDF files in various compressed and uncompressed formats through the designed machine data acquisition interface.It is also optimised for reading and analysing large STDF test files,which significantly reduces the waiting time for users to analyse test data.The main research elements of this thesis are as follows:1.This thesis first analyses the structure and characteristics of STDF test files,and classifies STDF file test data according to the test process,based on which the machine data acquisition interface is designed for acquiring test data,realising the decoupling of the machine test procedure and the test data storage procedure.At the same time,this thesis uses a variety of compression formats to save STDF files,reducing the space required to store test data.2.The test data analysis interface program described in this thesis takes the component under test as the unit,allowing the user to view test-related configuration information and to analyse and export test data.The design also separates the main interface from the other display modules to facilitate the addition and combination of functional modules in the main interface..The design of this thesis addresses the problem of time-consuming reading of largecapacity STDF tests,and designs an optimisation solution for large-capacity STDF test files.By creating an address index design and a slice-by-slice parallel reading design,the time users spend waiting to load a large-capacity STDF file test file when reading and analysing test data is significantly reduced,while the generated address index file only takes up a small amount of additional storage space.Through the above research,this topic finally realises the IC test data storage and analysis software design,and after testing all the functional modules,it is verified that the design described in this thesis meets the design requirements for IC test data storage and analysis.