Design Of Logic Analysis Module With 10GSPS Sampling Rate

With the rapid development of the electronics industry,in the modern testing process,there may be a variety of signals in the signal system under test.For example,in current electronic products,due to the complex functions of the products,there are more and more digital circuits and serial high-speed buses in the electronic system,and many of these designs include a combination of analog technology and digital technology.In the method,when testing a system with mixed-signal analysis,engineers use an independent oscilloscope and logic analyzer to complete it.The traditional testing method requires two instruments,which is not practical.In order to achieve better test results and also meet the relevant test requirements of analog waveforms and digital waveforms,mixedsignal oscilloscopes(MSO Mixed-Signal-Oscilloscopes)are produced in this way.The mixed signal oscilloscope includes an oscilloscope module for testing analog signals and a logic analysis module for testing digital signals.It can test both high-speed analog signals and high-speed digital signals.And it can synchronously process the sampled analog signal and the sampled digital signal,which can realize the sharing of analog channels and digital channels,increase the total number of channels of the oscilloscope,and greatly improve the testing ability of complex bus systems.It is widely used in the field of electronic research and development and national defense.technology and other fields.Based on the mixed-signal oscilloscope developed in the laboratory,thesis designs a logic-analysis module(Logic-Analysis,referred to as LA)with a sampling rate of10 GSPS.The main indicators of the logic analysis module are: the number of channels is16,the sampling rate is 10 GSPS,the bandwidth is 2GHz,the storage depth is 512 Mpts,the delay between channels is less than 1ns,and the input impedance is 100k?/8p F.Trigger mode: edge trigger,pulse width trigger,pattern trigger,setup and hold time violation trigger,etc.The main work of this paper is as follows:1.Analyze the function and index requirements of the logic analysis module,study the technical means to realize the key index of the 10 GSPS sampling rate of the logic analysis module and the overall scheme of the logic analysis module,and select the key chips in the design based on the index of the oscilloscope module.2.Design the front-end analog circuit design of the logic analysis module,solve the index requirements of the high bandwidth(2GHz)of the logic analysis module,as well as the back-end high-speed interface circuit and signal digital processing circuit,and finally complete the high-speed transceiver(GT)in the FPGA.The sampling process of high-speed digital signals.3.Design the time base system of the mixed signal oscilloscope,realize multi-time base display by means of decimation/interpolation,and design the overall trigger scheme of the system in combination with the oscilloscope module.Under the principle of traditional analog trigger,the method of using multi-channel parallel digital edge trigger is greatly improved trigger accuracy.And a hybrid trigger module is designed to realize the acquisition and storage synchronization of logic channel and time domain channel.And complete the deep storage design of the logic analysis module.