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The Hardware Design Of64-channel Bus Analyzer Module

Posted on:2014-07-28Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2268330401964556Subject:Detection Technology and Automation
Abstract/Summary:PDF Full Text Request
The computer system bus is the bottleneck of the computer system development. Inthe field of test,The test bus pulls the development of virtual instrument in high speed,high precision and Automatic Test Equipment (ATE). However, in domestic, just inrecent years, the bus is studied and applied, and there are many unsolved problemsexist in bus application. All of these problems are raised by the bus test instruments.In order to solve the problem, this dissertation designed a test module of analysis,which can be applied in bus testing. In this module, the PCI is its communication portwith host, and the FPGA is its the key chip. The designed module can implement busanalysis function and provide64channel data acquisition and data generation functions.Especially, the module is with mutually trigger、persistently trigger and analysis thethree kinds of serial bus protocol.The contributions are as following:1、The basic hardware circuit of the bus analyzer module is designed. According tothe standard structure and design requirements, the structure of the module is scientificlly designed. The circuit and the FPGA program of the two basic parts of the bus analyzer module (data acquisition module and data generation module) are designed.2、The two patterns of the bus analyzer module, the interaction trigger and persist-ent trigger, are designed. In this model, just the specific data and corresponding collecti-on time are collected. Compared with the traditional model, the stored data are reducedgreatly. In this model, the bus analyzer module can continuously monitor the object. Theinteraction trigger model is designed, which makes the two modules no longer just asimple superposition combination.3、The protocol analysis function of the three kinds of serial bus(1553B,CAN,I2S)are designed. The three kinds of serial buses are deeply analyzed. Based on predecessor-rs’ study, a more concise and reasonable bus trigger module is designed.4、The debugging and testing of the prototypes are carried out. After the design ofthe prototypes, the prototypes are debugged. Finally, the final test results show that allof the four prototypes conform to the requirements of the indicators.
Keywords/Search Tags:Bus Analysis, interaction trigger, persistently trigger, protocol analysis
PDF Full Text Request
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