FPGA Design And KMDF Driver Implementation Of High Speed PCIe Transmission

In the era of big data,data transmission and processing is becoming to a top priority topic.As for transmission technology,PCIe bus has been in the leading position of the industry with its high transmission power and good immunity.While ensuring transmission speed,it is also important to deal with the flexible and stabilized data interaction.This dissertation combines the PCIe bus technology with the interaction between the FPGA board and the computer.It is supported by the flexibility of the FPGA board processing.At the same time,it uses Microsoft's latest object-oriented drive model WDF as a framework to design and implement the kernel mode.KMDF driver and FPGA board to ensure stable and fast data transmission and processing.In this dissertation,I first study the theory of PCIe bus protocol,and design and implement the PCIe interface and related modules of FPGA card according to the protocol.The work is divided into two parts: the one is the research of PCIe bus protocol.Here,the protocol standard is analyzed theoretically from three levels of PCIe,and the format and function of each level data packet are mastered.At the same time,the common signals in the PCIe bus communication are listed.The other is to design and implement an FPGA module for data transfer and data processing according to the PCIe bus protocol.The FPGA part mainly implements the IP hard core for converting the PCIe bus signal and the AVALON-ST signal used by the FPGA board.At the same time,a transmitting and receiving module for data transmission is implemented.The module includes conversion logic links for analyzing and packaging AVALON signals.In addition,this dissertation designs and implements the FIFO queuing module for the time redundancy caused by high coupling between FPGA modules,which balances the load among modules and effectively increases the data transmission and processing efficiency.In terms of software design and implementation,this dissertation designs and implements the KMDF driver in kernel mode through the theoretical research of WDF framework and the related characteristics of FPGA board.It mainly includes the two parts of driver design and implementation and application design and implementation.In the driver part,the related functions of the KMDF framework are first written,including hardware resource allocation functions,I/O callback processing functions,interrupt handling functions,and DMA processing functions.Since the traditional DMA module uses only one buffer for mapping the host computer and the hardware device,this results in the received data overwriting the transmitted data,resulting in failure to verify the transmitted data and failing to implement retransmission.Therefore,this dissertation designs and implements the use of two buffers to separately map the two input and output spaces to perform DMA transfer.This increases the fault tolerance rate and implements the retransmission mechanism.In the application part,this article uses the kernel API to communicate with the driver,write the processing function of the relevant I/O control code to prepare the data and accept the data,so that the data can be displayed intuitively.In the final experimental work,this dissertation first verified the data transmission between the application program and the driver,and then verified the communication between the driver and the FPGA board.Finally,the three were combined and the simple calculation logic was added to the FPGA board.The FFT data processing module performs data transmission and processing experiments.Through the comparison of the experiments,the two different processing methods have obtained the correct processing results,achieved the purpose of the experiment,and verified the feasibility of the data processing of the host computer through the peripheral hardware,which has certain application value and practical significance.