Design Of System Aging Monitoring Unit And Voltage Regulation Scheme

With the continuous progress of integrated circuit technology,the number of transistors on VLSI chips is increasing,which will reach the level of 10 Gigabit transistors on a single chip.The advanced manufacturing technology has greatly improved the performance of the chip and reduced the cost of the chip.However,the progress of process nodes increases the problem of circuit aging caused by Negative Bias Temperature Instability(NBTI),so the research on circuit aging monitoring and regulation technology is very meaningful.NBTI effect has stress period and recovery period.It is because of the recovery period of NBTI effect that it is possible to alleviate aging.NBTI effect will directly lead to the negative drift of the threshold voltage of PMOS devices,which leads to the degradation of circuit performance and the increase of delay in the timing of the circuit.According to the simplified NBTI degradation prediction model based on ReactionDiffusion mechanism,this paper analyzes the influence of NBTI effect on device operation,predicts the degradation of threshold voltage of PMOS transistor in 65 nm process,studies the influence of NBTI effect on circuit,and simulates the influence of NBTI effect on delay degradation of basic logic gate circuit and D flip-flop.NBTI effect increases the delay in the timing of the circuit,so it can indirectly reflect the aging condition by monitoring the timing.According to the different locations of the monitors,the sequential monitoring methods can be divided into Critical Path Replica(CPR)and In-Situ Monitor(ISM).The monitoring circuit of ISM is placed in the actual circuit,which can truly reflect the timing of the circuit.Therefore,the aging monitoring unit of this paper is designed based on ISM.In the traditional design,a certain voltage margin is often added to the minimum nominal voltage to ensure that the circuit can meet the demand in the worst case,but it will lead to high energy consumption.This paper designs an AVS control circuit based on Adaptive Voltage Scaling(AVS),which can not only ensure that the chip will not make mistakes after aging,but also eliminate the conservative timing margin in the circuit as far as possible and reduce power consumption.Aging monitoring unit,OR-tree and AVS control circuit constitute the aging monitoring and regulation system.In this scheme,the monitoring unit is placed at the end of the monitored path.Considering the cost of area and power consumption,it cannot monitor all paths,so the selection of monitoring points is very important.In this paper,the monitoring points are extracted after clock tree synthesis,and the specific reference circuit S953 is taken as an example to illustrate the extraction process of aging monitoring points and how to complete the placement of monitor and warning signal generation circuit.Through the system hybrid simulation,with the deepening of circuit aging,the power supply voltage of real-time regulation gradually increases,and the aging circuit can still work normally,that is,the aging monitoring and regulation system designed in this paper can achieve the expected function.In order to reduce the error rate of system monitoring,the adjustable delay module is further designed.After evaluation,the monitoring window can be expanded with less area overhead.