Design And Application Of Low-Power Multiplier Based On Approximate Computing

With the rapid development of the Internet of Things(Io T),the demand for low power consumption by smart mobile devices is increasingly urgent,owing to the limit of their hardware resources and battery life.As a high-efficiency and low-power computing paradigm with broad application prospects,approximate computing(also known as imprecise computing)has shown obvious advantages in fields such as image processing,deep learning,Io T,edge computing,and real-time signal processing.In these fault-tolerant applications,approximate computing can achieve substantial optimization of performance and power consumption by generating approximate results(good enough but not completely accurate results).Therefore,compared with the precise logic circuit,the approximate circuit is more simplified,thereby effectively reducing the power consumption and improving the performance.As a basic arithmetic unit,the multiplier is of great significance to the processor by reducing its power consumption and improving its performance.The design and application of a low-power approximate multiplier based on approximate computing technology are studied.An unbiased approximation 4-2 compressor is proposed,which error compensation feature effectively improves the accuracy of the approximate multiplier.Based on the proposed various approximate modules,two unbiased approximate multipliers(UBAMs)are designed,including UBAM-M1 multiplier and UBAM-M2 multiplier.The main contents of this dissertation are as follows:(1)The proposed unbiased approximate 4-2 compressor generates positive and negative sign errors in balance,increasing the chance that 4-2 compressors in the same column of the multiplier generate opposite sign errors,which decreases its error.(2)Two unbiased approximate multipliers are proposed.The high-precision UBAM-M1 multiplier is proposed to improve the accuracy of the approximate multiplier.The low-power UBAM-M2 multiplier effectively combines multiple approximate methods such as truncation technology and approximate compressors,which provides a new effective solution for the collaborative design research of low-power approximate multipliers.The experimental results indicate that,compared to the previous designs,the UBAM-M1 multiplier significantly improves the accuracy of the approximate multiplier,and the UBAM-M2 multiplier improves over 22% on delay,28% on power consumption,26% on chip area,almost 39% on PDP,and almost 46% on EDP.(3)The application for image filtering is presented to show the validity of the proposed approximate multipliers.The experimental results indicate that,the image quality processed by the high-precision UBAM-M1 multiplier is significantly improved;the low-power UBAM-M2 multiplier offers 58.12% PDP saving at the cost of 1.24% SSIM degradation.