Design Of Binary Multiplier Based On Approximate Computing And Its Application In Fault-Tolerant System

Approximate computing is an emerging paradigm in the design of energy-efficient digital systems by exploiting the inherent error resilience of applications,such as multimedia processing,pattern recognition,machine learning and data mining.By relaxing the requirement of traditional exact computation,approximate computing shows the potential for substantial energy efficiency and performance improvement.As multiplication is a fundamental operation and extensively used in many digital signal processing systems,the design efficiency on digital multipliers often impose a large impact on the entire system.In this paper,a new hybrid Radix Booth coding method with high radix approximation and an approximate 4-2 compressor circuit are proposed.The design principle and method are described in detail.Based on these two approximate methods,the circuit performance index and calculation accuracy index of multiple approximate binary multipliers are simulated,compared and analyzed.The proposed binary multiplier based on approximate calculation is applied to image contrast adjustment,discrete cosine transform(DCT)and finite impulse response(FIR)digital filters to prove its practicability and applicability.The hybrid Radix Booth coding method with high radix approximation proposed in this paper has an accurate error model.When the hybrid Radix Booth coding method with high radix approximation is applied to the multiplier with 12 × 12 and 16 × 16 bit width,the improvement of hardware performance is very obvious.The approximate 4-2 compressor proposed in this paper has unbiased error characteristics and obviously reduces the circuit complexity.The approximate multiplier with approximate 4-2 compressor has the characteristics of excellent accuracy index and accurate error adjustment.It is suitable for the application scenarios with higher requirements for multiplier error,and has a better compromise effect under a smaller operation bit width.For the combination of the hybrid Radix Booth coding method with high radix approximation and the approximation 4-2 compressor,the error results can be predicted before the simulation,and the design of precision adjustment range can be further refined.Based on the new approximate multiplier proposed above,three kinds of fault-tolerant systems with different bit width and application are built,and the simulation and analysis of hardware performance and accuracy index are carried out.To sum up,the approximate method proposed in this paper has obvious optimization of hardware performance index,and approximate multiplier can be widely used in faulttolerant system.