Large-capacity Static Random Access Memory, Low-power Research

Recently, as the dominant applications of semiconductor memory continuously expanding, mobile communications, mobile multimedia and mobile storage market rapidly enlarge, which has led to the share of memory presents the tendency of steadily increasing. SRAM is a member of the huge memory family. These days, in order to meet the different applications, there are two clear development direction for SRAM productions. One of them is the high-speed device that required for high-performance communications network. Another is the low-power device, which will satisfy the demand for portable communications and SOC systems. Optimizing SRAM power is not only greatly reduce the system power, which can solve the heat problem and protract the battery life, but also significantly reduce costs, the most important thing is to save energy,truly be the "green technology".This thesis is focus on low-power design of high-capacitance SRAM. A 1Mx8 SRAM is designed, which can write and read correctly, and its average power is 1.59W, improved about 22% than before, with other design parameters achieving the anticipative goal.The main work of this thesis is as follows:Chapter1 summarizes the research background and meaning of this thesis, gives the reasons why low-power design plays an indispensable role and analyses the research situation of SRAM.Chapter2 introduces the basic knowledge of SRAM and low-power design theory. Simultaneously, expounds the conception of static noise margin, at the end of this chapter gives several popular low-power design technology now.Chapter3 puts the methods for optimizing power to each function module and designs corresponding circuits, in which designs for the decoder and precharge circuit of SRAM are required to especially consider.Chapter4 designs a high-speed and low-power current-mode sense amplifier, analysis how the sense amplifier works, meanwhile optimizes the timing control circuit and gives the simulation results. Chapter5 presents the configuration of 1kx8 SRAM and gives simulation results, then accomplish the circuit design of 1Mx8 SRAM. In the end, finish simulation of the whole circuit.Chapter6 is the summary, in which improvements of the circuit design for SRAM and prospects of future works are pointed out.