UVM Verification Platform For ARM And RISC-V MCU

Smart devices are the necessity of the modern world.The key component of a smart device is the digital control microchips.The digital chips are getting more and more complex and flexible due to the ever growing function requirements of smart devices.For a large digital chip,the verification effort is usually several folds greater than the design efforts.The verification is the key to the time-to-market and first-pass success.As the most widly used verification methodology in the industry,UVM(Universal Verification Methodology)has great advantages in reducing verification costs and improving the verification efficiency.Base on the UVM verification methodology,this thesis compares and analyzes difference between the ARM Cortex M core and an in-house developed RISC-V core and decribes a hierarchical and reusable verification platform that has been successfully used for fast verification of two MCUs(microcontroller unit)based on the Cortex M and the RISC-V cores.The main research and work are:(1)The design architecture and functional characteristics of the two MCUs are compared and analyzed,mainly including the features of the core,bus protocal and peripheral reusing,especially about the TrustZone feature intergrated in the ARM MCU.(2)A UVM verification platform using the interface between the core and the bus as the only entry is implemented,aiming at small and medium-sized SoCs(System on Chip)with the similar architectures.It can do the IP verification and sub-system verification at the same time.Based on the high reusability,the verification environments are designed to address both ARM M-based and RISC-V based SoCs.The catalog and version control with fast iteration are realized.Modules and system verification components are built.Automated test case creation and regression testing are realized with shell and perl scripts.(3)Constrained random stimulus are used for functional tests of the module and the system.Software and hardware simulation environment are built,and the collaborative verification is performed for the system functions with the combination of UVM and C.The simulation waveforms are analyzed,the regression test convergence is completed,and the code coverage and function coverage are collected and analyzed.(4)A processor performance comparison module is added to analyze and compare the capabilities of RISC-V and ARM Cortex M0 in interrupt processing as well as in sleep and wakeup modes.Based on the verification platform,this thesis has conducted the complete functional verification of the two SoCs.The code coverage and functional coverage reach 99.16% and 100% respectively.Both chips are verified by silicon implementation.