The Research On Calibration Of Narrow-band Dither In ADC

The Analog-to-Digital Converters(ADCs)are the hubs of communication between digital and analog signals,and play a vital role in areas such as wireless communication and radar detection.There are many kinds of ADC,and pipelined ADC has been widely used and developed by virtue of its ability to take both precision and speed.SFDR(Spurious Free Dynamic Range)is a key parameter to weigh whether the ADC performance is good or not.At present,many communication systems demand ever higher SFDR.However,in the actual circuit design process,the process deviations will bring many non-ideal factors,such as capacitance mismatch,comparator offset,etc.,seriously limiting the dynamic performance of pipelined ADC.Theoretical studies show that dither technology can improve the harmonic distortion of ADC which is caused by non-ideal factors and coherent sampling,and significantly improve the ADC's SFDR.In this context,combining the dither technology and pipelined ADC has great research significance to improve the dynamic range of ADCs.This paper is intended to verify the effect of narrow-band dither technology on the pipelined ADC,and provide a guidance for the design of high-performance pipelined ADC.First of all,this paper introduces the development backgrounds,research statuses and trends of ADC and dither technology.Then briefly introduces the ADC's basic working principle,performance indicators and types.And by comparing the advantages and disadvantages of different types,the design of a 12-bit 100 MSps pipelined ADC is proposed,including the selection of structure,the circuit principle and the design of the important circuit module.Finally the overall performance simulation results are given.Then it introduces the dither theory mainly,including the characteristics,types and embedded mode of dither.Several common generation methods of dither is introduced,and the narrow-band dither circuit designed in this paper is derived through comparative analysis.Then it analyzes the improvement of dither to the pipelined ADC dynamic performance.Next,a narrow-band dither technology based on the designed 12-bit pipelined ADC is introduced to verify its improvement on the spurious free dynamic range of the pipelined ADC.The common non-ideal factors in pipelined ADC are analyzed,and a narrow-band dither circuit is designed.The improvement of narrow-band dither is verified by simulating coherent sampling and harmonic distortion caused by DNL periodicity.Finally,a 12-bit pipelined ADC chip(ADS4122)is chosen for test.A test and verification scheme of the PCB(Print Circuit Board)is designed to verify the improvement of the narrow-band dither on the dynamic performance of pipelined ADC.The narrow-band dither generation circuit,superposition circuit and peripheral circuit are mainly designed.Finally the test results and analyses are given.