Design And Implementation Of L-DSP On-chip Debug Circuit

The emergence of Digital Signal Processor(DSP)has greatly promoted the development of the digital world and played a vital role in the Internet of Everything.With the continuous improvement of DSP performance and the increasingly refined manufacturing process,the production cost of chips continues to increase.Developers choose to invest more time in the chip verification process to ensure the correctness of the design,and good debugging methods can effectively reduce risks and save costs.L-DSP is a 32-bit microcontroller developed for high-performance real-time control applications.The core is an improved Harvard bus structure and an eight-stage pipeline.It has the characteristics of strong computing power,large storage space capacity and rich peripheral interfaces.In order to meet the debugging needs of L-DSP,this article combines the development process of L-DSP designs a fast on-chip debugging circuit based on JTAG interface.The debug circuit realizes the integration of boundary scan and debug functions.In addition to providing the mandatory functions in the JTAG protocol,it also implements debug functions such as storage resource access,CPU pipeline control,hardware breakpoints,hardware observation points,and important parameter statistics.The difference between this design and the traditional debugging method is that the debugging circuit realizes the direct transmission of data between peripherals and memory by adding DT-DMA data transmission channels,which greatly improves the debugging efficiency.In the end,this article conducted module-level verification of the debug circuit in the NC-Verilog compilation environment,and carried out system-level prototype verification of the debug circuit and the L-DSP full-chip RTL code under FPGA.In aspect of module-level verification,the test circuit is verified for the debug function by writing test incentives.The verification results show that the debug circuit module is correct.In aspect of system-level verification,the full-chip RTL code is integrated into the FPGA and connected to the debug software through the JTAG interface.The debug commands issued by the debug software are verified individually.The verification results proved that the debug circuit in this article works normally in the full chip environment.In addition,transmission speed of the DT-DMA module debug data was verificated through making the DT-DMA and the CPU transmit the same piece of data repeatedly,then counting the transmission time of the two methods.The result indicates that the speed of the DT-DMA transmission debug data is three times faster than the CPU transmission,which indicates that the DT-DMA module effectively improves the debugging efficiency and meets the initial expectation.