Research And Implementation Of The Design-for-Debug For Dedicated Data Processing Chip

With the rapid development of the modern integrated circuit industry,the functions of the chip are getting stronger and stronger,the architecture is more and more complex,and the working frequency and integration are getting higher and higher,so the probability of design errors inside the chip is greatly increased,and the chip is The ever-decreasing feature size makes the mechanical detectability of its internal nodes greatly reduced,thus making chip debug extremely difficult.At the same time,with the development of artificial intelligence,in order to meet people's demand for huge data processing,special data processing chips for artificial intelligence have received more and more attention;currently,the general debugging structure of general-purpose processors is not very good.Meet the debug needs of dedicated data processing chips with different characteristics.This paper takes the design for debug and implementation of a special data processing chip(Z chip for short)as the main research content of the thesis.Through detailed research and analysis on the processing algorithm,workflow and design structure of Z chip,the characteristics that need to be paid attention to the structure of Z chip's design for debug.The debug requirements analysis is carried out according to its characteristics,In order to meet special debug needs,we designed the structure of design for debug based on the JTAG debug interface and the custom debug interface to interact with the on-chip debug unit,and address the various memory and internal registers of the chip and set hardware breakpoints to achieve single step Debug and control state machines,etc.to enhance the observability and controllability of the design for debug structure.The structure of design for debug supports a variety of debugging functions including hardware breakpoint settings and single-step debugging,as well as off-chip memory read and write,on-chip memory read and write,and internal register read and write.Finally,RTL code design and simulation verification were carried out for each debugging component in the design for debug structure of Z chip.Through observation and analysis of the simulation waveform of each debug component,it was determined whether the design of each debugging component met the expected requirements.The analysis of the simulation results shows that the design of each debugging component in the debugging structure of Z chip is completely correct,and the debugging functions required in the debugging requirements can be realized,which provides strong support for the subsequent debugging of Z chip.