Research And Application Of Debug Strategy In Heterogeneous Multi-Core

With the rapid development of semiconductor manufacturing process and the continuous improvement of IC design capability, traditional single-core processors cannot meet the increasing application demands. In case of this situation, multicore systems emerge. Compared with Homogeneous multi-core systems, heterogeneous multi-core systems can achieve an optimal allocation of resources and have a greater advantage when dealing with giant data complex tasks. However, the appearance of heterogeneous multicore systems makes it harder to verify the correctness of hardware and software designs. A debug scheme cannot perform these complex applications without hardware support. Thus employing DFD to facilitate verification has gradually become an important means to improve the debugging efficiency and has attracted widely both academia and industry into the study.Given above problems, this thesis does some relevant research on debug strategies of heterogeneous multi-core systems. The main tasks of this thesis are as follows:Firstly, based on an existing heterogeneous multi-core architecture, a configurable and tailorable DFD model has been designed and implemented in this thesis, providing strong support for the production and application of the target system chips. The DFD model has two main parts:on-chip debug architecture and PC software. This thesis focuses on the hardware part.Secondly, through deep study of the debug probe in the On-chip debugging architecture, this thesis finely analyzes the debugging scheme in different resource nodes in the target system and the corresponding DP configuration and completes the DP’s RTL design of all types of resource nodes. In addition, the effectiveness of the design is discussed according to the area overhead of each DP implementation on FPGA.Finally, the function verifications via DPs integrated in the target system are given that proves the correctness of the DPs in RTL and FPGA level. Furthermore, via testing a step debugging instance, it is proved that the debugging design model can quickly locate where the error is and effectively complete the debugging of the target system through any combination of different modes.Debugging design model in this thesis features in the debugging control on the target system as follow. (1) Taking offline debugging program which pre-sets a breakpoint or trigger point. When the breakpoint is triggered, the system will be halted until relevant debugging data is obtained. (2) Providing five different debug modes to meet the needs of practical applications of the target system. At any one debugging operation, one corresponding debugging control demand is generated for selected model. (3) The design of debug unit keeps to modular rule. So, the DPs of different system resource nodes can be achieved by tailoring their functions accordingly. (4) DPs are configurable. The breakpoints or viewpoints can be flexibly set through configuring content in control registers.