Analysis And Design Of JTAG Debug Under Multicore Architectures

With the development of multi-core processing on a single chip multi-corearchitectures becoming mainstream. In the process of developing multi-core SOCchip, the internal integration of resources is more and more and more complex,making the signal of the original cubicle which can be a very good observationgradually become the on-chip signal, which increases the difficulty of debuggingproblems in the development process. Now multicore debugging problems moreand more severe and will be placed in front of the developers. Therefore the designof JTAG debug under multicore architecture has been conducted in this paper.In this paper, based on the PowerPC’s quad-core platform, a research onmulticore JTAG debug is launched.The main research focuses on how to makemulti-core at the same time to enter debug state when one core to enter debug state,what kind of debugging scheme to reduce the occupation of resources and how toimprove the efficiency of debugging. About synchronous debugging, this paperpresents a synchronous debugging of proposal that support the grouping. Anyprocessor in the same group in line with the breakpoint trigger conditions, allprocessors within the same group all at the same time to enter debug state. Inmulticore SoC environment, the traditional schemes have some disadvantage. Inorder to solve these problems, improved multi TAP debugger program is putforward. It absorbs the advantage of the traditional method, supp orts debug of thesingle core or all cores in the same time and is compatible with IEEE1149.1standard.In addition, as a complement to the JTAG debug trace technology is a veryeffective solution for multi-core realtime debugging The principles of.tracetechnology is analyzed, and then a simple and effective multi-core trace method ispresented. With the method and the trace encode table, a programme can bereconstructed. It also can ease the problem of tight pins in multicore environment.At last, the test and verify is passed. The results prove the veracity of themethod of the multicore debug. And as well, the problem of tight pins is eased inmulticore trace debug.