| In the semiconductor industry, integrated circuit SoC (system on chip) constitutes the leading technology. A SoC is an application-specific integrated circuit containing processor, memory, and logic functional blocks. Through hardware and software co-design, SoC products are now small, lightweight, low power, high-speed, low-cost and multi-function. Since the system is very complex, it becomes quite difficult for debugging, which promotes efficient and low-cost JTAG technology's standardization and widespread use. Testability technology is an important research area of SoC design methodology. After the SoC chip taped out, software debugging will be time consuming and but important for the system. So the convenient debugger is of great significant for the products and market. CSoC (Configurable SoC) is a kind of SoC. In this paper, we will design an on-chip debugger based on JTAG standard. The debugger depends on the hardware design of a controller CSoC.To meet customer needs, Agate Logic, Inc. using the APGA technology to integrate high-performance 8051 core and FPGA logic in one CSoC chip. The chip has programmable characteristics while cost-effective. That's to say, CSoC is a programmable and configurable embedded system.In this paper, the target system is the high performance 8051 CSoC, and the debugger interface is OCDS (On Chip Debugging System). The software Keil, which is widely used for 8051 develop, is installed in the host PC. To accord with most of the users, USB is chosen as the communication protocal between PC and debugger.In this paper, the essential part of design is software design. To make the software easy to design and maintenance, we divide the software into three levels, which are Keil interface layer, communication layer and firmware layer. FS7805 from Fulhua Microelectronics Corp. (FameG) is chosen as the logic chip to make the debugger. APLIF (Advance Programmable Logic Interface) in FS7805 is programmed to generate the JTAG signals. Besides, in this paper we try to use FIFO in FS7805 to generate JTAG logic directly from PC. It is more efficient, portable, and easy extended way in software aspect.The debugger supports effective debug functions such as software/hardware breakpoints, single step execution, monitoring the registers and memory. The debug system is of good reference to other SoC design. |