Design And Implementation Of Multi-rate And Multi-length Non-binary LDPC Codec

At present,Chinas marine economy is developing rapidly.With the gradual advancement of the "21st Century Maritime Silk Road" and the "Maritime Power Strategy ",the demand for high-quality multimedia services from maritime communications is increasing.The existing ship wireless communication system not only has a low data transmission rate,but also is mostly incompatible with each other,and can only basically meet the conventional communication requirements of maritime activities.In order to improve the above problems and meet the multi-code length and multi-rate requirements of maritime wireless communications,this thesis has made in-depth research on non-binary low density parity check(NB-LDPC)with multi-rate and multi-length.And optimizes and researches from three aspects: the construction of check matrix,the design of coding algorithm and encoder,the design of decoding algorithm and decoder.A multi-rate and multi-length NB-LDPC code with excellent error correction performance was constructed,and the codec design was completed based on FPGA.The main contents of this paper are as follows:Firstly,several commonly used LDPC code rate compatible implementation methods are studied.Based on the matrix structure of the binary LDPC Raptor-like codes in the 5G standard,and combined with the quasi-cyclic shift matrix construction method,A multi-rate and multilength NB-LDPC code matrix that is easy to implement in hardware is constructed.Then,the commonly used LDPC coding algorithm is studied.Based on the constructed check matrix,a multi-rate and multi-length NB-LDPC coding algorithm is proposed.Considering the coding performance and hardware resource cost,the NB-LDPC code encoder is designed by partial parallel design.Use Model Sim and VIVADO software platform to perform functional simulation and synthesis of the encoder to verify the logical correctness of the encoder design.Then,the decoding algorithm of multiple LDPC codes is studied.Considering the complexity of hardware implementation,decoding performance and the number of decoding iterations,the decoding algorithm suitable for hardware implementation is selected to complete the design of multi-rate and multi-length NB-LDPC code decoder.Use Model Sim and VIVADO software platform to perform functional simulation and synthesis of the decoder to verify the logic correctness of the decoder design.Finally,the board level verification and debugging of the multi-rate and multi-length NBLDPC code codec are carried out by using the DIGILENT GENESYS2 hardware platform.The validity,stability and decoding performance are tested and verified.The designed codec satisfies the system performance index requirements and provides solutions for future engineering practice.