| This thesis explores the implementation of a new fractional-N phase-locked loop frequency synthesis method. A sigma-delta modulator is used to control a dual modulus divider, thereby achieving fractional modulus division. This divider is placed in the feedback path of a phase-locked loop frequency synthesizer; hence, fractional-N frequency synthesis is achieved.; In the course of this study, a fractional-N phase-locked loop frequency synthesizer prototype was designed, built, and tested. This thesis examines the synthesizer's phase noise performance and transient response. By comparing the measured results to the ones predicted by simulation, the synthesis method and its model are validated. |
