Distributed architecture for effective solid state power management

In the design of today's solid state power controller modules, the digital architecture of a power control box requires much consideration. This thesis highlights many of the issues involved in solid state power management and identifies the major bottlenecks that can exist due to a number of factors present in the hardware and software. A central focus of this research is the investigation of the benefits and drawbacks to utilizing a distributed microcontroller architecture for these types of applications. In this context, a number of generic design issues have been investigated including determining the applicability of real-time operating system kernels, evaluating the effectiveness of employing specialized interprocessor communication protocols, analyzing the worst case timing behavior associated with polled and interrupt driven operation, and establishing the criteria to be used to determine exactly which portions of the problem should be encoded in high-level language versus assembly language. For realism, much of this work has utilized a microcontroller Solid State Power Control Module (SSPCM) that was designed by McDonnell Douglas under a Boeing contract for a Space Shuttle experiment rack and a follow-on design of a central processor system for the Space Station.