| The computer industry originated the idea of computer aided design for very large scale integrated circuits to boost productivity, reliability and to minimize the size of the circuit. Since then, many tools have been developed by the circuit manufacturers to suit their needs.; This work describes design and implementation of {dollar}rm Vsb-Gen,{dollar} an object-oriented tool which automatically generates VHDL specification based on user design data. The schematic editor within the tool allows the user to enter a combination of VHDL and schematic design specifications as part of the design data entry. This flexible design data entry feature helps the user in design abstraction, since it allows the designer to use VHDL for complex circuits and schematic design specification for simple circuits. {dollar}rm Vsb-Gen{dollar} has an integrated compiler which checks for design errors in the design data. The integrated compiler provides selective compilation of the design by making use of previous compilations. The schematic editor and the integrated compiler also help in rapid design prototyping by allowing the user to switch between various architectures for a component without additional compilation. VHDL generator within {dollar}rm Vsb-Gen{dollar} generates VHDL only for the recently modified parts thereby reducing design cycle time. Furthermore, the VHDL generator explores possibilities of optimization by replacing a set of interconnected instances with a single component.; Implemented in C++ and Xview under Unix, V{dollar}sb-{dollar}Gen has an easy-to-use interface, and it supports top down design paradigm. |
