The Research Of 8051IP' Design And Verify Based On VHDL

As a very important branch of computer, single-chip microcomputer (SCM) has aroused people pays close attention to and takes seriously since it was invented in 1976, expecially the MCS-51 series SCM which was produced by the USA Intel company, have already get very broad application in our country for its cabinet, flexible and it's low cost, powerful controlling and so on. But with the coming of the communication age, the disadvantage of the traditional SCM was discovered because of its connatural structure defect. Its speed, scale and performance can't meet more and more requirements of the users in many special fields. So the development and upgrading of SCM is faced with new challenges.The Electronic Design Automation(EDA) technology has become an important design method of digital circuit system as the integrated circuit's growing. And with the gigantic development of System design technologygy, system on a chip(SOC) was aroused people pays more and more attention to for its advantages of high integration , high performance , low power consumption and low cost. Intellectual Property is the key technology of SOC. we usually make Microprocessor and Memory element and so on to be composed of programmable SOC chip using Intellectual Property in SOC design with FPGA.The design mechod which is on basis of Multiplex of IP have become the main design mechod for which can improve the efficiency development of SOC. IP designing middle large amount of multiplex intellectual property rights module in the chip, can make the IC designer accelerate the chip exploitation speed thereby on the design energy is concentrated on higher level. Developing IP that having independent intellectual property right have the prospect applying broadly not only and have importance to raising our country IC designing and application level.The research mission of this thesis is on basis of 8051 SCM, and combined with inner structure of FPGA,to design describtion of the system using vhdl language.The system which is coming true can use with FPGA and the instruction system which is coming true is coincide with the instruction system of 8051 SCM. And then complete simulate testing of all modules with the tool of QuartusⅡsoftware. 8051 IP core of what be come true can boost our monolithic machine and the teaching may become the logic component course working. And, our country improves the development educating informationize at present on the degree educating informationization resource to build 8051 IP cores flaring like fire set to dry tinder , come true being unable to can certain.This thesis carried out principle analysis and characteristic abstraction to 8051 SCM firstly, introduced EDA exploitation implement and design plan of this IP core. 8051IP core was divided into different modules that the function was single with the top-down design mechod.And then every module was described with VHDL and all programs were synthesized and simulated with QuartusⅡsoftware.Finally the 8051IP had been entirely composed of all modules adopting the mochod of principle picture linking.After completed, we synthesized and simulated to all modules of 8051IP with QuatrtusⅡsoftware. It used the method of observing simulated wave form to Verify simulated result in simulator process. And the basic function of 8051IP is correct after simulator.In the end of this thesis, it made a summary to design process, pointed out the defects of the thesis, and suggested the next work of improvement and follow-up.