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Integrated Design Based On The Vhdl Advanced Integrated Automatic Control System Of Underwater Vehicle

Posted on:2003-11-13Degree:DoctorType:Dissertation
Country:ChinaCandidate:G PanFull Text:PDF
GTID:1118360095450737Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
This paper researched the ASIC design in the automation system of a kind of AUV with high-level design method based on VHDL High - Level Synthesis. Systemic ASIC design will reduce the capacity of system , increase reliability , enhance confidentiality, and will result in economic and military benefit, which have important engineering applied worthiness. Now high-level design method based on High-Level Synthesis is a popular research project in the field of ASIC design and this kind of method has not been put into use completely, so the paper researches the ASIC design in the automation system of a kind of AUV with high-level design method based on High- Level Synthesis and will devote to the development of EDA technology of our country greatly. The works finished in the paper conclude: 1 ) Based on embedded analysis of ASIC system, the paper put forward thedesign scheme of the core controller 805 1 and its periphery circuit and designedframe architrave of the system.2) With systemic analysis, the paper analyzed the VHDL syntax structure deeply, and put forward the characters of algorithmic behavioral description and the tactic of behavioral description, so the paper designed the algorithmic behavioral description program of the automation system of the AUV. The structure of the program VHDL code is good, readable and the code has about 3000 lines.The paper brought forward simulation tactic of complex numeral system, designed VHDL testing basic program and finished simulation validation of system function blocks.3) The paper discussed the theory and the method of ASIC High-Level Synthesis:〢nalyzed the synthesizable problems of VHDL language systematically, and discussed the establishment and the implementation methods of VHDL synthesis subclasses.㏕he paper established a midst data format figured by High-Level synthesis design, which is CDFG model, put forward the CDFG denotation of basic sentences in VHDL synthesis subclasses chose in the paper and gave out the automatic creation methods of CDFG.(3)The paper researched two powerfully practical kinds of attempering method of High-Level synthesis, which were based on function cell maximal utility rate and conditional structure. By examples the capability of the two kinds of arithmetic were tested, and the results were optimized. The paper discussed the expandedness of the two kinds of arithmetic.(4)The paper analyzed and researched the powered improved unite distribution. By examples, the arithmetic of powered improved unite distribution was more effective than that of unite distribution on the problems of resources distributionThe paper gave out a kind of iterative attempering distribution advanced arithmetic. And in the case of pledging the fewest function blocks were needed, the paper considered the interaction between attempering and distribution course, and decreased the quantity of memory components and join components.(5)The paper dissertated collection of control information, and realized the join between the results of control flow synthesis and data flow synthesis.4) The paper discussed high synthesis realization in the automatic system of the AUV with <> .5) The paper established the void movement equation group of the AUV, and prepared for control-system design.The paper finished software design of automatic system in the kind of AUV by using output feedback variable structure control method and non-liner variable structure method. The paper advanced current output feedback variable structure arithmetic and eliminated chatting. The control system designed had not only good dynamics quality and stable characters, but powerful parameter Robusty.In the research of non-liner variable control methods, the paper brought forward a kind of variable structure control machine with time-changing , non-liner , "standard time optimization" on-off super curved surface. The automatic system designed had quick dynamics-respondence, little , powerful Robu...
Keywords/Search Tags:AUV, Automation System, Variable Structure Control, ASIC, VHDL, High-Level Synthesis, Data Channel, CDFG, Operation attempering, Recourse Distribute
PDF Full Text Request
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