| In the era of the nanometer CMOS technology, due to stringent system requirements in power and performance, microprocessor manufacturers are relying more on chip multi-processor (CMP) designs. CMPs partition Silicon real estate among a number of processor cores and on-chip caches, and these components are connected via an on-chip interconnection network (Network-on-chip). Since interconnects have been projected as the limiter in nanometer designs in terms of power and latency, the communication infrastructure would significantly impact the performance, area, and power of future CMPs. The contemporary solution to building many-core on-chip interconnects is the use of CMOS repeaters. However, despite improvements in transistor speed from one technology generation to the next, wire resistance and capacitance scale poorly. To mitigate this impact on future CMPs, we explore the use of RF-interconnect (RF-I) that can simultaneously communicate among multiple communication channels with reconfigurable bandwidth allocation, and yet provide low energy per bit.;First, we propose a micro-architectural exploration framework that can be used to facilitate the exploration of scalable CMP architectures based on physical planning and prototyping, particularly for CMPs with a large number of cores.;In multi-band RF-I, a wide tuning range on-chip frequency synthesis approach is required to enable the simultaneous generation of multiple carrier frequencies in the mm-wave range. The design and implementation of two new approaches in multiple carrier frequencies generation, simultaneous sub-harmonic injection locking technique and the multi-band left-handed resonator technique, are described in this dissertation.;Furthermore, a simultaneous tri-band on-chip RF-I for future network-on-chip is demonstrated. Two RF bands in mm-wave frequencies, 30GHz and 50GHz, are modulated using amplitude-shift keying, while the base-band utilizes a low swing capacitive coupling technique. Each RF-band and base-band carries 4Gbps and 2Gbps respectively. Three different bands, up to 10Gbps, are transmitted simultaneously across a shared 5mm on-chip differential transmission line. The energy per bit is 0.125pJ/b/mm in base-band, while RF-band is 0.09pJ/b/mm.;Finally, we demonstrate that RF-I has dramatic potential in terms of low-latency, low-power and high-bandwidth operation, which are the keys for the future CMP. |
