Research On Key Technologies Of Continuous-time Photonic Time-stretch Analog-to-digital Converter

Photonic time-stretch analog-to-digital converter(ADC) can compress the bandwidth of input analog signal so as to improve the performance of existing electronic ADC and it has been a research hotspot in the photonic ADC. Due to the time-aperture limitation,the traditional time-stretch ADC is difficult to satisfy the continuous-time signal sampling. For this situation,this thesis mainly studies the key technologies of continuous-time photonic time-stretch ADC,including optimization and realization of continuous optical carrier generation module,research on multi-channel technology based on time-stretch ADC and experimental verification. The specific tasks include:(1) After fundamental analysis the structure of existing continuous-time time-stretch ADCs,this thesis proposes an optimized multi-channel architecture which can generate continuous optical pulse trains. Theoretical analysis is carried out on requirements of realization of continuous-time time-stretch ADC and corresponding multiplechannel demultiplexing processing.(2) The effects of inter-channel offset, gain and time mismatches have been studied by numerical simulation. For correcting inter-channel mismatches,a method based on the overlap between segments has been studied. After that, numerical simulation is carried out on effectiveness of this method.(3) For the implementation of the multi-channel photonic time-stretch ADC,selection criterias of mode-locked fiber laser,Mach-Zehnder modulator and dispersion medium have been discussed. Besides, this thesis shows the manufacture processing and technology of the continuous optical carrier generation module, specifically the technology of key device's parameter measurement, power equalization and precision delay control between channels. According to existing experimental condition, we demonstrate a three-channel experimental system with the sampling rate of more than 200GHz/s, bandwidth of 40 GHz,and effective number of bits of 3.7. This experiment verifies the effectiveness of the proposed multi-channel architecture and the correction by the overlap between segments can improve the signal-to-noise ratio of the system.