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A New Calibration Method Based On PN-Code-Injection For Capacitor Mismatch In SAR ADCs

Posted on:2021-03-29Degree:MasterType:Thesis
Country:ChinaCandidate:T J FuFull Text:PDF
GTID:2428330626956047Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
An analog-to-digital converter(ADC)is a circuit that can convert analog signals into digital signals.Analog signals are continuously changing signals,while digital signals are discretely changing.According to the type of signal processed,integrated circuits can be roughly divided into two types: analog circuits and digital circuits.Due to higher integration,lower power consumption,high adaptability and portability,and strong antiinterference ability,digital circuits are more widely used than analog circuits.In the integrated circuit industry,"more digital and less analog" gradually becomes a trend.But because most signals in nature are analog signals,such as temperature and sound,if the digital circuit is to be widely used,the signal type conversion function of the ADC is essential.In order to meet the specific needs of different applications,there are various types of ADCs,including Sigma-Delta ADCs,Pipelined ADCs,Flash ADCs,and Successive-Approximation-Register(SAR)ADCs.Among them,SAR ADCs,due to their low power consumption and small chip area and the rapid development of portable consumer electronics,have been increasingly valued by academia and industry today.However,because SAR ADCs are often affected by non-ideal factors during their work,their performance is limited,a calibration algorithm is needed to cancel the effects of nonideal factors to improve their performance.In this paper,after introducing the performance parameters,circuit structure,basic working principle,sources of various non-ideal factors and corresponding measures in detail,the capacitor mismatch in the capacitor array,which usually has the most impact on limiting performance of SAR ADCs,is aimed to be calibrated.A new real-time digital background calibration algorithm based on pseudo-random sequence injection is proposed.And in the calibration algorithm,a voltage judgment module and the addition of a redundant capacitor are used to eliminate the problem of incomplete injection of the pseudo-random sequence.In the calibration algorithm,the sign bit of the product is used to replace the specific product value,which greatly reduces the complexity of the hardware circuit and the chip area and circuit resources required for the calibration algorithm.After analyzing the effects of different setting parameters in the various structures of the SAR ADC,the overall calibration scheme is determined and the optimization algorithm effect,especially the convergence speed and calibration accuracy are optimized.In this paper,a 12-bit differential-ended SAR ADC with capacitor mismatch with a sampling frequency of 125 MHz is used as an example to verify the feasibility of the proposed calibration algorithm and evaluate the final calibration effect of the calibration algorithm.After the design of the calibration algorithm,MATLAB simulation is performed first.After verifying the function,the RTL code is written in hardware description language,and then Modelsim is used to perform the function simulation.After the function simulation is passed,download the calibration algorithm to the FPGA using Vivado.The final result of the on-board test is: the signal-to-noise ratio(SNR)after calibration is 72.39 dB and the ENOB is 11.73 bits.The algorithm is verified to be feasible.
Keywords/Search Tags:Successive-Approximation-Register ADC, Pseudo-random Sequence, digital background calibration, capacitor mismatch
PDF Full Text Request
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