Design And Automatic Layout Generation Of Dual-port SRAM Based On DICE Structure

The dual-port SRAM memory is more and more widely used in technologies such as pipeline and multi-instruction transmission,and is one of the effective means to improve the throughput rate.Due to the uniqueness of the aerospace environment,the demand for highly reliable radiation-resistant memory design has increased,and the automatic layout generation method can effectively improve the efficiency of memory design.This article takes dual-port SRAM as the research object,and researches on the DICE structure memory and automatic layout generation method.In this paper,through in-depth analysis of the working principle of dual-port SRAM,radiation hardening is performed on the circuit and layout of t he memory by using SMIC 0.18?m process.According to the structure and characteristics of the dual-port SRAM,its function and timing specifications are determined and an architectural scheme adapted to variable specification SRAM memory is planned.For the SEU effect,the 16 T DICE unit is designed for circuit-level reinforcement,and the reinforcement effect is verified through radiation simulation.The peripheral circuit is realized by using hierarchical decoding,latcher-type voltage sensitive amplifier and so on,and circuit simulation on the common 32?32 bit complete dual-port SRAM memory is performed to analyze its function and performance.In view of the SEL and TID effects,the layout-level reinforcement method that increases the isolation ring and expands the physical distance between the NMOS and PMOS transistors is used to design and implement the physical layout of each part of the dual-port SRAM memory circuit.This paper studies the automatic generation of GDS layout files of dual-port SRAM memories with variable specification.By analyzing the characteristics of the dual-port SRAM layout with different parameters,the relationship between the circuit connection and the physical connection is summarized,the hierarchical structure is divided,the layout is determined,and the basic cell library of layout is organized.With the help of the inherited and derived classes in the Python API to manage the basic units in batches,the parameterized layout of macro module and full memory is generated by combining the layout operation function and generation function.The maximum operating frequency of the dual-port SRAM memory is 100 MHz,and the capacity range is from 32 bit to 16 K Byte;the parameters include word line depth,which ranges from 16 bit to 4K bit;bit line width,which ranges from 2 bit to 32 bit;and the multiplexer width are 4,8,and 16.Finally,SRAM memory with representative structure and layout is selected to automatically generate its parameterized layout and ensure the design is correct through layout verification and post-simulation.