Research And Verification Of All-digital Receiver Based On FPGA

With the development of wireless communication technology,the data transmission rate is getting higher,and the signal bandwidth is getting wider.2G,3G,LTE,5G and other mobile communication networks will maintain coexistence for a long period of time.Design,construction,and optimization of networks have brought many challenges.In order to improve the flexibility of the communication system,the software radio method is gradually applied,which is beneficial to the design of miniaturized and high-performance communication equipment,and can cope with the problem of coexistence of multiple standards and multiple frequency bands.Based on the principle of software radio,we studied and verified an FPGA-based all-digital receiver in this paper.In principle and structure,we introduced the difference between an all-digital receiver and a traditional analog receiver.A sampling scheme of an FPGA-based all-digital receiver was given.The receiving system was simulated and analyzed in MATLAB.The FPGA processing of digital RF signal was developed in Vivado,and the all-digital receiver was verified on the board.The main contents of this study include:1.PWM sampling based on high-speed comparator.On the basis of the Ser Des differential interface integrated in FPGA,a reference signal was generated as the reference voltage for PWM sampling.The high-speed comparator of the differential interface quantizes the analog RF signal into a digital signal,it replaces external high-speed analog-to-digital converter and has features of integration.In addition,the multi-level sampling of dual-channel PWM was also studied.2.The effect of the reference signal on the PWM sampling.The type,frequency,and amplitude of the reference signal are the key factors that affect the sampling result of the PWM.The relationship between the frequency of the reference signal and the PWM harmonics was analyzed.We combined the op amp,low-pass filter and other modules to generate the reference signal,and realized the dynamic switching of the reference signal frequency through the FPGA.3.PWM digital signal processing.We designed and implemented a parallel digital down-conversion module with adjustable frequency,further analyzed the PWM quantization law,combined with the comb filter principle,proposed a decoding algorithm to reconstruct the baseband signal,and verified the feasibility of the algorithm through MATLAB simulation,and implemented the algorithm in FPGA.4.FPGA experiment verification.Based on the Xilinx FPGA development platform,the dual-channel PWM multi-level sampling and the dynamic switching of the reference signal frequency were verified,and the data processed by the FPGA was collected.The VSA software was used to calculate the relevant indicators.We compared the data with the MATLAB simulation data and verified the feasibility of the receiver.