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The Characteristic Analyses Of Folded Silicon LDMOS With High-Permittivity Dielectric

Posted on:2020-11-11Degree:MasterType:Thesis
Country:ChinaCandidate:T T ShiFull Text:PDF
GTID:2428330602950738Subject:Microelectronics and Solid State Electronics
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The developments of power electronic technology have been referred to as the Second Electronic Revolution,and now related to people's production and life as well as the country's economy,politics and national defense.Power electronic technology,with power semiconductor devices as its core components,has been the most efficient,reliable and flexible power conversion and control technology in recent decades.It has been widely used in household appliances,automotive electronics,high-voltage power transmission,weapons and many other fields.As one kind of power semiconductor devices,lateral double-diffused metal-oxide-semiconductor field-effect transistor?LDMOSFET?has been widely applied in radio frequency,microwave circuits and other high-frequency fields due to its high input impedance as well as fast switching speed.Moreover,it has lateral structure which results in its capability to be integrated.One of the key indicators to judge the electrical characteristics of a power semiconductor device is that the device is able to achieve a certain breakdown voltage?BV?and simultaneously has the specific on-resistance(Ron,sp)as low as possible,so that the power loss of the device in the ON-state can be minimized with the promise of the BV.With the aim above,in this paper,two new LDMOS devices are designed and studied based on the theory of high-k materials and semiconductor physics and devices using ISE-TCAD device simulation platform.The main innovative achievements of this paper include the following three parts:1.A high-voltage LDMOS?HK-FSLDMOS?applying HK dielectric as field oxide is proposed with the combination of high-k material and folded silicon LDMOS?FSLDMOS?.On one hand,FSLDMOS has advantages of high channel density,the majority-carrier accumulation effect and strong electric-field modulation effect.So its specific on-resistance is significantly reduced when compared with traditional planar LDMOS.On the other hand,as a field oxide layer,HK dielectric has so strong electric-field modulation effect on the drift region that the doping concentration of drift region can be largely increased while maintaining the certain BV.As a result,the specific on-resistance of the device is reduced.The proposed HK-FSLDMOS combines the two aspects and achieves a better relationship between BV and Ron,sp.The simulation results show that the device has the BV of 450 V and has low Ron,sp of 11.7 m?·cm2 when the relative dielectric constant of HK is 300 and the thickness is 0.2?m.The Figure of Merit?FOM?of the proposed device is higher than that of other LDMOS devices in literatures.2.The analytical model for BV-Ron,sp of HK-FSLDMOS is established based on the fundamental theory of LDMOSFETs and semiconductor physics.The plot of the model shows that the FOM of the device considerably increases and saturates gradually with the increase of relative dielectric constant of HK from 3.9 to 500.The influences of HK dielectric constant and thickness on the FOM of HK-FSLDMOS embodied by the model are generally consistent with the simulation results.But there is a deviation between the two in that the derivation process of the model is too simplified,and therefore the model shows a better performance than the simulation.3.Combining folded silicon majority-carrier accumulation LDMOS?FALDMOS?with high-k material,we propose a low-voltage LDMOS?HK-FALDMOS?with HK dielectric replacing part of SiO2 field oxide.On one hand,HK dielectric has the ability to modulate the electric field in drift region and to reduce the on-resistance.On the other hand,FALDMOS device not only has the advantages of doubling channel density and strong electric-field modulation effect,but also has a stronger carrier accumulation effect in the ON-state due to the metal gate electrodes extending and covering the whole drift region.The simulation results demonstrate that HK-FALDMOS has the BV of 44.9 V and ultra-low Ron,sp of 9.9 m?·mm2 when the relative dielectric constant of HK is 8 and its thickness is 0.3?m.And the BV-Ron,sp performance is state-of-the-art compared to other LDMOS devices in literatures.Finally,the process flow of HK-FALDMOS is briefly introduced.Only one additional mask is needed,on the basis of process steps of FALDMOS,to deposit HK dielectric.
Keywords/Search Tags:power semiconductor devices, LDMOS, high-k dielectric, breakdown voltage, specific on-resistance
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