FPGA-based Flash Memory Test System

With the feature of high-speed, high-capacity, non-volatile and high reliability, Flash memory has been gradually used in aerospace electronic systems in recent years. Variety of high-energy protons or high-energy ions in aerospace work environment incident on the electronic component can radiation effects, which cause the electronic component composed of satellite electronic system in damage or failure, such as the storage unit of Flash memory flip 1 to 0 or 0 to l possibly, and data errors, logical confusion, instruction exception, the program go to die or go fly like, even reduce the lifetime of spacecraft in orbit. The Flash memory of aerospace electronic systems must be able to adapt to space radiation and other complex environment firstly. Based on the actual needs of this field, to design a Flash memory automatic test system. The system use typical memory test algorithms for Flash memory testing under irradiation conditions, Some anti-irradiation parameters of Flash Memory can be obtained by the statistical analysis of experimental results.This paper studies the structure, the working principle and the ionizing radiation effects of Flash memory, describes the Flash memory functional model and fault model, and finally complete the design of the overall test system based on some typical test algorithms, such as all-0 full 1 algorithm, checkerboard algorithm. The test system consists of upper computer and lower computer, the data transmission path through upper computer and lower computer use Gigabit Ethernet. Upper computer is the PC, the upper computer is developed by C++ under Windows platform application development environment(VS2010), complete the control of test operation,display the working status and process the results of test data; Lower computer implemented by Xilinx's Kintex-7 series FPGA, Gigabit Ethernet communication protocol completed by FPAG combine with Marvell 88E1111 chip, FPGA is also responsible for driving the testing Flash memory.The lower computer complete the hardware description language for each module in the Xilinx ISE Design Suite 14.4 environment, including the logic design of Gigabit Ethernet logical link sublayer, network layer, transport layer, application layer and the Flash memory test algorithms. The functions of lower computer are simulated under Mentor's Modelsim SE 10.1b simulation software environment. Showing the workflow of Flash memory testing in radiation environment.The overall functional test results show that the test system is expected to be able to complete the expected design function, due to the advantages of high-speed parallel FPGA, FPGA with the characteristics of reusable online programming, this test system to complete the desired function while the follow-up according to the needs to upgrade the system with a high engineering practical value.