Research On The Thermal Stress Field And Fatigue Life Of Power Chip/DBC Substrate Bonding Structure Based On The Self-propagating Foil

As the core devices of power electronics technology,power semiconductor devices have been widely used in power systems,rail transit,industrial manufacturing equipment,household appliances,military defense and many other fields."Made in China 2025" proposed to vigorously promote the development of the power equipment,focusing on the development of key components of high-power power electronic devices.The development of high-power devices is inseparable from the support of packaging technology.Selfpropagating interconnection have the advantages of fast reaction speed,high heat concentration and narrow heat-affected zone,which can avoid the choices of the interconnect materials and the IMC growth caused by further reflow of the package modules,having good application prospects in power device packaging.In this paper,selfpropagating foil was used as a local heat source to interconnect large-area chips and DBC substrate.the thermal stress field of the self-propagating heating process was studied,and the fatigue failure of the solder layer under temperature cycling was analyzed.The specific work is as follows:Firstly,by using Non-fourier law and moving heat source,a three-dimensional finite element model,which was about the temperature filed of bonding large-area chip and DBC substrate by self-propagating foil was established.The temperature distribution of the bonding structure during soldering process was analyzed.By reducing the thickness of the solder layer and increasing the preheating temperature,the maximum temperature and melting time of the solder layer can be significantly increased,the quality of the solder joint was also improved.Secondly,the stress field calculation model of the self-propagating foil bonding process and reflow process were established respectively,the stress and warpage of the structure during soldering process was analyzed.Deformation of the chip surface was measured to verify the finite element model.After the self-propagating foil heating process,the structure was concavely warped,residual stress in the chip and solder layer were large,but the residual stress in the DBC substrate was relatively small,concentrated in the region closed to the heat source.After the reflow soldering process,the bonding structure was convexly warped,residual stress in the chip and the solder layer was small,and the residual stress in the DBC substrate was large.Finally,based on the residual stress and deformation calculated above,the stress and strain field of the bonding structure during temperature cycling were calculated.We can get that residual stress after soldering has little effect on the fatigue life of the solder layer,and the interface between the chip and solder layer was the weakest zone.The fatigue life of the self-propagating interconnect structure and the reflowed structure conforms to the device temperature cycling standard.