Design And Dynamic Characteristics Investigation Of 4H-SIC MOSFET

Silicon Carbide?SiC?has the characteristics of high critical breakdown electric field,high thermal conductivity and wide bandgap,making it promising for applications of high power,high frequency and high temperature power electronic system.Among the SiC power devices,SiC MOSFETs are regarded as the power devices that can make the best use of material potentials in the gate-controlled power devices.However,there are two major issues which limit the SiC MOSFETs to make the best use of material potentials.One is high gate-drain charge(Q_GD).As the drift thickness of SiC MOSFET is about one tenth as thin as that of Si under the same breakdown voltage,the Q_GDD of SiC MOSFET tends to be much larger than that of Si.The other is the forward conductive voltage of parasitic diode.The SiC MOSFET features an integrated body diode with much higher turn-on voltage than that of Si MOSFET.In order to improve the performance of SiC power electronic system and save the energy,it is necessary to improve the dynamic characteristics of SiC MOSFET from the point of device design,and give full play to the advantages of SiC MOSFET.To reduce the Q_GDD of SiC MOSFETs,a 4H-SiC MOSFET called DS?Double Shielding Structures?-MOS with a split gate?SR?and P shielding region?PSR?is proposed.The working mechanisims of the DS-MOS are as follows:on the one hand,the split gate structure reduces the overlapping area between the control gate electrode and the drain,reducing the gate-drain capacitance(C_GD)and Q_GD;on the other hand,the SG acts as a shielding layer between the control gate and drain,further decreasing the gate-drain capacitance(C_GD)and Q_GD.The PSR transforms the most part of C_GD into the gate-source capacitance(C_GS)and drain-source capacitance(C_DS)in series through the coupling effect,which reduce the gate-drain capacitance(C_GD)and Q_GD of the DS-MOS.The revelant parameters and dynamic characteristics of the DS-MOS are simulated,and the Q_GD and C_GD(@V_DS=600V)of 26 nC/cm² and 13 pF/cm² are obtained respectively without BV degradation.Compared with DT-MOS,the Q_GD and C_GD of the DS-MOS are reduced by 85%and 81%.Compared with CT-MOS,the Q_GDD and C_GD of the DS-MOS are reduced by 81%and 84%.Finally,the dynamic characteristics of the proposed DS-MOS are greatly improved.To improve the parastitic diode of the SiC MOSFET,a 4H-SiC MOSFET with an integrated schottky barrier diode?SBD?,called ISBD-MOS,is proposed.The ISBD-MOS also has two trench structures,one is the gate trench,and the other is the source trench.The ISBD-MOS features an integrated lateral SBD between the PSR and P-body.Most of the SiC MOSFETs integrate SBDs on the cells'surfaces,forming vertical SBDs.The ISBD-MOS boats a unipolar reverse conduction path with low turn-on voltage and low reverse recovery charges.Under the same simulation conditions,the reverse conductive voltage of 1V of the ISBD-MOS is obtained,while that of DT-MOS is 2.7V.Moreover,the reverse recovery charges of the DT-MOS is 7619nC/cm²,and that of ISBD-MOS are only 5517 nC/cm²,reducing by 28%.In addition,the proposed ISBD-MOS can not only avoid the bipolar degradation effect,but also can reduce the module volume and area,improve the power density and reducing the additional power dissipation caused by passive devices.