Research On Short Channel Double-gate And Surrounding-gate MOSFETs By Simulation

When the feature size of modem integrated circuit (IC) processes decreases to thenanometer level, applications of traditional planar metal-oxide-semiconductor field effecttransistor (MOSFET) have encountered many challenges. Among various new semiconductordevices, multi-gate MOSFETs are the most promising ones to promote the continuousdevelopment of ICs. Multi-gate MOSFETs such as double-gate (DG) MOSFET,surrounding-gate (SG) MOSFET and FinFET, have some common advantages. Both area andvolume of the inversion layer in multi-gate devices can be increased by increasing the numberof gates, leading to increased tum_on drain current and improved load-carrying capacity ofthese devices. Furthermore, the inversion layer can be extended from the Si-Si02interface tothe interior of Si film in multi-gate structures, leading to reduced interface scattering andincreased carrier mobility. The performance of multi-gate devices can be further improved bycombining with applications of new materials, making the continuous decrease of feature sizepossible. Current research efforts on multi-gate devices are mostly concentrated on improvingthe process, introducing new materials and developing new device models. In this thesis, wefocus on the research of nanoscaled short channel DG and SG MOSFETs. By establishingreliable device models, we analyze the effects of physical parameters on the electricalcharacteristics and the short channel effects (SCEs) of devices. Main research content of thisthesis is introduced as follows.Firstly, by solving the two-dimension Possion’s equation of intrinsic or lightly-dopedshort channel DG MOSFETs, the channel potential model with considering the electronquasi-Fermi potential is established. Analytical models for threshold voltage and SCEs arederived. Both the effect of electron quasi-Fermi potential on the channel potential and theeffects of channel length and thickness on the SCEs are then analyzed. Results indicate thatthe electron quasi-Fermi potential has significant effect on the channel potential, particularlythe surface potential near the drain. Considering the electron quasi-Fermi potential makes thedeveloped device model more accurate, and decreasing the channel thickness appropriatelycan suppress the SCEs of short channel DG MOSFETs.Secondly, the analytical channel potential models for SG MOSFETs with doped channeland undoped channel, respectively, are established. Analytical models for threshold voltage ofSG MOSFETs are also derived based on the potential models. Effects of doping concentrationon the channel potential and threshold voltage are investigated. Results indicate that thethreshold voltage increases with increasing doping concentration. The ideal threshold voltagecan be obtained by adjusting the doping concentration. In addition, decreasing the channelradius of the SG MOSFETs appropriately can also suppress the SCEs.Finally, since multi-gate Schottky source/drain MOSFETs can reduce the parasiticresistance and capacitance of the traditional doped source/drain and improve the currentcharacteristics, the effects of dopant-segregation technology on the performance of thesedevices are investigated. An analytical subthreshold full-channel continuous potential modelof DG dopant-segregated Schottky (DSS) MOSFETs has been established by solving the three-segment continuous two-dimensional Possion’s equation with considering the Schottkybarrier lowering effect. Analytical expressions for threshold voltage and drain-induced barrierlowering effect are derived based on the potential model. The channel potential distributionswith different doping concentrations in the dopant-segregated region are investigated. Effectsof channel length and channel thickness on the SCEs are also analyzed. Results indicate thatthe dopant-segregated region can improve the electrical performance of Schottky barrierMOSFETs. For short channel DG DSS MOSFETs, their SCEs can be effectively suppressedby appropriately decreasing the channel thickness.In order to verify reliability and accuracy of the above-established models, the TCADtool Sentaurus is used to simulate the devices. The simulation results and the resultscalculated according to the proposed device models are in good agreement, indicating that ourdevice models can provide useful support to design, produce and apply these new multi-gateMOSFETs.