Digital Baseband SoC Chip Design For UHF RFID System

IOT(Internet of things)is an important trend in current communication technology industry,which is bringing the third information waves to the world's information industry.In the development of Internet of things,RFID(Radio Frequency Identification,RFID)technology is the core technology.The market demand and development prospect of RFID technology is immeasurable.In the RFID technology,the core part is the tag and reader,and their mainstream implementation method is single chip design with the SoC technology.This thesis designed the digital baseband SoC chip of an ISO/IEC 18000-6C type UHF RFID system using open source MC8051 processor.First,by analyzing the requirements of the protocol,the system is divided into the software part and the hardware part.Then,the software and hardware are developed by the software and hardware co-design technique.Using Verilog hardware description language,the hardware part has implemented UHF RFID baseband communication link module,which is connected with MC8051 through the WISHBONE bus.In the meantime,the software running in MC8051 which has realized part of the communication function between the reader and the tags specified by the protocol,is designed with C language under the Keil environment.In software design,the function generated by the system generates random numbers,which will take up a large amount of memory.For this problem,a solution to achieve random numbers by hardware is proposed,and the randomness of the generated random number is verified by experiments.Successful baseband communication between the reader and tag has been achieved under the Modelsim environment,and also the reader baseband transmitting function has been verified on the Altera DE2-115 FPGA development board.