Research On Key Technology Of High-speed Multi-Phase Clocks Generator

The demand for ever-increasing system performance in the consumer market is mainly reflected in the speed requirements of the products.In common high-speed circuit systems,such as high-speed interface circuits,precise timing control is a common method for increasing speed.This also poses a challenge to the design of high-performance clock generation circuits.The parallelism of multi-phase clocks is widely used to solve timing constraints in systems,and has been practically applied in multi-GHz clock and data recovery circuits and time-interleaved data converters.In addition to parallel processing of multi-phase clocks,accurate multi-phase clocks generator can also be used for variable pulse-width control in optical-storage media,fast generation of fractional clocks in phaselocked loops,and delay measurements in time-to-digital conversion.The focus of this master's thesis is to study the key technologies of high-frequency multi-phase clocks generator.Firstly,it summarizes the advantages and disadvantages of various common structures,and analyzes the working principle and existing problems of all kinds of phase interpolators.Then,in order to solve the linearity problem of the traditional phase interpolator,a new switched-capacitor based current steering phase interpolator is proposed,while an improved resistor string based phase interpolator has been designed.After simulation and analysis,a two-stage 40 phases clock generator under 1 GHz has been designed.The phase difference between adjacent output clocks is 25 ps.The system consists of an open loop delay compensated Coarse Stage and a 40 parallel phase interpolators Fine Stage.By simulatimg the circuit and layout,the function and performance has been verified.Finally,a time-based generator is implemented based on the proposed multi-phase clocks generator.Under the 40 nm CMOS 1P7 M process,the chip and test of the chip has been completed successfully.The test results show that the measurable noise bandwidth of the chip reaches 20 GHz,with the accuracy under 1 mV,which demonstrates that the time-based generator also works well.The designed multiphase clocks generator achieves good linearity with a simple structure and a small area of 300 um×90 um.The maximum DNL is 0.12 LSB and the maximum INL is 0.32 LSB.