Design And Implementation Of Embedded Information Processor Based On Vpx

With the continuous development of semiconductor and hardware circuit technology,the parallel information processing system based on DSP processor arrays have been widely used in defense,industry,biology,communications and other fields;meanwhile,information processing equipment is increasingly becoming smaller,more general,and more energy-efficient.The system can optimize the allocation of computing resources and the network architecture according specific application scenarios for different application areas and different types of information types.This requires that the image processing system must have a flexible and efficient data interaction architecture and a perfect system management control mechanism at the same time as its computing capacity.In this paper,a comprehensive information processing device based on DSP array is designed.This system uses six TMS320C6678 to achieve the system peak 1.5TFLOPS or 3.0TMACPS computing capacityThe interconnection between each computing node(DSP),interface node(FPGA)and main control node(SoC)in the system is realized through a single-star network with SRIO switching chip as the core.The SRIO ports of each computing node in the system have a port bandwidth adaptation function,which is more flexible and compatible than the existing solutions in the industry.Meantime,this article also proposes a Layer-2 Gigabit Ethernet switching design method in a VPX system.Inside the system unit,Gigabit Ethernet used to implement auxiliary data transmission,on-line boot,and system monitoring.It uses Layer-2 data communication to simplify the hardware circuit composition,greatly reducing the PCB layout space and overall power consumption.Furthermore,sufficient signal integrity analysis was done in the early design of the PCB in order to ensure the performance indicators of the system DDR3 high-speed storage interface and high-speed SerDes interface.At last,the BER rate of the bare SerDes channel is tested after the PCB layout is completed.After the completion of the PCB assembly,the power supply test and clock jitter were tested.The joint assembly and system are adjusted after the completion of all the functional tests of the boards.The test results fully prove that the system performance fully meets the requirements of the indicator.