USB Interface Signal Integrity Design And Analysis

Engineers must consider the matter of signal integrity in the case of designing high-speed digital system. The rising edge of the signal changes faster and faster due to the chip clock frequency increases, then signal integrity is the direct product of the chip development. With the enhancement of processor power, bus data transfer rate has become a bottleneck. How to accelerate the bus data transfer rate become one of the central issue which an engineer research.This paper is about Signal Integrity based on the Universal Serial Bus USB2.0. First rising transmission line theory of signal integrity problems in high-speed interconnect, focuses on differential transmission lines which impact USB2.0placement and routing. Through the data acquisition interface circuit for CY7C68013chip design using cypress, based on Mentor signal integrity analysis of HyperLynx simulation tools, simulation before and after the effect of simulation, mainly research characteristic impedance transmission line is brought to the high speed design, simulation for fast batch processing simulation and interactive simulation, layout and provide theoretical basis the wiring for high-speed circuit design. Finally, we compared test results and simulation,both meet the USB2.0specification, the process for the next generation serial bus speed to further enhance research methods and theoretical basis.