Realization Of Real-time And High-resolution SAR Imaging Based On FPGA

Synthetic Aperture Radar?SAR?imaging technology is an important direction in radar imaging technology.It has the characteristics of high resolution,full-day and ultra-long-distance^[1].With the development of SAR,traditional design methods can no longer meet the higher requirements of resolution and real-time.Small-sized,low-power and large-resolution real-time SAR imaging systems have increasingly become a research hotspot.Traditional design method adopts FPGA+DSP processing architecture.Signal preprocessing is implemented on FPGA.Motion compensation,migration correction and pulse compression are implemented on DSP.The FPGA is designed using FFT/IFFT IP core.Data processing is slow in this method,and data longer than 65536 can not be processed.Traditional design can not meet the higher requirements of real-time and resolution.With the increasing demand for the performance of SAR,the processing task of DSP is becoming more and more heavy.On the other hand,the scale and performance of FPGA devices is improving gradually.It is possible to implement the SAR imaging on a single FPGA.In this thesis,three imaging sub-algorithms are integrated into the“FFT+frequency domain filtering+IFFT”model.A high-speed FFT module is designed using radix-16 FFT algorithm.The filtration in frequency domain can be processed by changing the phase factor to the filter coefficient.IFFT processing can be performed immediately after filtering results are stored.The model can process 16 points of data in parallel,and the control is uniform.Compared with the implementation using the FFT IP core,this design can input and output in parallel and process data longer than 65536.This design eliminates transmission of data between modules while improveing the processing speed.In addition,two sets of RAM buffer are used to further improve data throughput.The module designed in this thesis supports SAR imaging of 4096²62144 points of data.The function of this module has been verified.The echo data are processed by R-D algorithm on the development board.After processing the 4096?16384 points of data,we get a 1024?1024 gray image,which takes 6.51 seconds.Compared with the image obtained by MATLAB,the root mean square error is 6.34,which verifies the correctness of this design.