Research And Implementation Of High Speed And High Precision FFT Processing Scheme Based On FPGA

The FFT(Fast Fourier Transform)algorithm has important applications in various fields involving digital signal processing,and therefore faces more and more challenges,prompting researchers to continuously improve the algorithm and structure of the FFT.This paper mainly studies a general-purpose FFT processor,which mainly considers the calculation speed,data precision,flexibility,complexity,resource utilization,etc,and obtains the best design scheme through contrast simulation,and implements it based on FPGA.Firstly,based on the current classical FFT algorithm and FFT structure,the appropriate algorithm and processor structure are selected according to the problems to be solved.Considering that parallel computing and cascade structure consume more resources,this design adopts sequential processing structure,and uses a butterfly computing unit to complete FFT calculation.Moreover,sequential processing structure can also expand to cascade structure at the expense of resources,which has certain extensibility.In the aspect of algorithm selection,because of the difficulty of Radix-8 or higher,complex control and poor flexibility,the hybrid algorithm of radix-4 and radix-2 is chosen in the design.Secondly,for the implementation of radix-4 algorithm,four-way parallel computing mode is adopted to improve the computing speed;for the implementation of radix-2 algorithm,four-way parallel mode is still adopted,that is,two radix-2 operations can be completed in one cycle.A real-time computing structure is designed,which uses the storage mode of table tennis.One memory is used for computing,the other is used for receiving input sequence,and the real-time calculation is completed by switching each other.Designing a variable point multiplexing structure,this paper supports FFT calculation of 1k,2k,4K and 8K points.Processors and rotating factor storage modules are configured to make them suitable for various modes.Meanwhile,mode selection signals are used to generate control signals of different modes to control addresses and operations of different modes.Finally,the accuracy and implementation complexity of different data representation methods are analyzed.The implementation process of floating-point algorithm is too complex and the error of fixed-point algorithm is large.Therefore,an improved fixed-point algorithm is proposed,which is simulated in MATLAB and the FFT function in Matlab toolbox is used as the standard result,calculating the signal-to-noise ratio.Compared with fixed-point algorithm,the accuracy is improved by about 5 d B.Circuit implementation based on FPGA,fixed-point simulation using quartus,2k-point sequential requires 3072 clock cycles with four-way data parallel computing.Multiplication module is implemented by time division multiplexing,and use 40 M clock.It takes 153.6us to complete a 2K FFT operation.If time division multiplexing is not used,it takes 76.8us for a 40 M clock to complete the 2K FFT operation.The simulation results are compared with the fixed-point algorithm of matlab,and the results are identical.Finally,the program is downloaded to the development board for debugging,and the design is completed.