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Low Power Design At The System Level For ARM CA5 Processor

Posted on:2019-10-11Degree:MasterType:Thesis
Country:ChinaCandidate:B X QinFull Text:PDF
GTID:2428330572452070Subject:Engineering
Abstract/Summary:PDF Full Text Request
The ARM CA5 series processor is the main processor in the smart phone baseband chip,and mainly accomplishes functions such as data synchronization and encryption and decryption between the smart phone and the base station.In order to reduce the power consumption of mobile devices,this thesis carries out the relevant system-level low-power design work for ARM CA5 processor,the main work includes:Firstly,conduct systematic research on low-power methods commonly used at home and abroad.On the one hand,analyze the influencing factors of power consumption from the perspective of digital circuits;on the other hand,combine the characteristics of the company's projects to analyze the source of ARM CA5 series processor power at the system level.Secondly,Dynamic Voltage Frequency Scaling(DVFS)is used to configure and manage the voltage and frequency of the ARM CA5 series processor.The System Power Control Unit(SPCU)dynamic switch cores between different performance levels and dynamic adjust the operating status of the LMU(Local Memory Unit),according to the principle of voltage ramp up first,frequency drop down first,orderly adjusting the supply voltage and clock frequency of each core of ARM CA5.This completes the switch of the kernel performance level and reduces the core power consumption.Thirdly,for the ARM CA5 internal memory module LMU,conduct low-power design from the working mode aspect.According to the ARM CA5 core and other modules to access the LMU's frequency to dynamically switch the LMU's operating mode,thereby reducing the power consumption of the LMU part.Last but not least,in order to verify the feasibility of the system-level low-power design of the ARM processor CA5 series in this thesis,a power simulation platform Power Artist was used to simulate the power consumption of the designed gate circuit.The results show that using DVFS technology,the power consumption of the ARM CA5 processor part is reduced by 29%.The static power consumption of the LMU is reduced by more than 60%after adopting this design scheme.In summary,the method of this thesis can effectively reduce the power consumption of the system,and it can alleviate the power consumption problem of smart phone to a certain extent,which has a strong practical significance.
Keywords/Search Tags:Baseband Chip, Low Power, Operating mode, Power Simulation, Dynamic Voltage Frequency Scaling
PDF Full Text Request
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