Dynamic Voltage Frequency Scaling For Clock Of Baseband Chip And Circuit Application Practice

Integrated Circuit(IC)develops from the simplest germanium,and silicon transistors to the current complex system on chip,has been followed Moore?s Law all the time.As a part of the digital circuit system,baseband chip also needs the clock signal to achieve the specific functions.Due to the logical complexity and the multi-level timing,an independent clock generation unit is required to uniformly generate and manage the clock signal.In addition,the performance of the baseband chip also requires high frequency clock signal.Whereas,these demands make the chip power consumption problem become more and more serious.In the pursuit of green energy,the development of low-power consumption technology can not only further enhance the chip performance,besides,the scientific concept of sustainable development also has important practical significance at the present time.In view of the above problems,based on the program of the clock generation unit architecture design part of Intel company,this paper focuses on the design of the clock support-generation unit of each module in the baseband chip of mobile phone,and the low-power consumption technology based on the dynamic voltage frequency scaling circuit.In this paper,the clock generation,switching,gated clock,and power source of the integrated circuit,as well as the cross-clock domain technology,are described in detail,which provides a solid theoretical basis for the follow-up technology.Then,the clock source working mode,no glitch clock output,and frequency selection circuit of the clock generation unit architecture design part are introduced in detail.Finally,low-power technologies are introduced,including hardware support frequency changes,automatic multiplexer clock source control,as well as CPU load monitoring unit.These low-power technologies are achieved through hardware and software common control.Specifically,the software part controls the switch of the register,while the hardware section controls the clock switching and the signal response.Thereby reducing the power consumption by dynamically controlling the voltage.Through the analysis of the above related theories,and the application of the technical means based on these theories,a dynamic voltage frequency scaling technology based on clock architecture is proposed.The designed model is simulated by Model Sim software platform,and the scheme is optimized by analyzing the results of simulation waveform,so as to reduce the power consumption of the chip.It is hoped that through the research of this paper,we can provide a reference for the realization of the future low power consumption design.