The Research Of Image Processing Unit Module's Verification Based On SystemVerilog

With the development of integrated circuit and computer image technology,people's demand for image quality is getting higher and higher,and GPU of graphics processor is developing rapidly.The core part of the GPU is a 3D engine for rendering 3D images,and image processing unit as the main part of 3D engine,it used to complete bitmap operation,texture operation,pixel operation and image processing.Image processing unit as the main data path in the GPU and the principal means of image processing,Its rich data access and huge amount of data computing presents challenges to traditional verification methods.Functional verification is an indispensable stage in the development of a chip,usually occupying about 75% of the development cycle,with System Verilog verification language,transaction-level verification technology can greatly improve the efficiency of functional verification.This dissertation focuses on the core image processing unit in the GPU 3D engine,and focuses on the verification of the image processing unit module verification based on System Verilog.First of all,the functional specification of the image processing unit and the Open GL protocol are studied.The image processing unit including the image pipeline,image processing subset,texture operation,pixel operation and other functions are analyzed in detail.Based on this,the verification strategy is formulated and extracted.Verification of functional points.For the function points to be verified by the image processing unit,this paper uses System Verilog verification language and builds an image processing unit verification platform for automatic comparison based on transaction-level verification technology.The verification platform consists of four parts: interface-based function bus model,reference model,transaction generator,and monitor.The function bus model based on interface has completed the interaction between image processing unit and image processing unit.The reference model fully realizes the function of image processing unit module,and can be used for the reuse of module level simulation.The transaction generator encapsulates the Open GL function associated with the image processing unit as a transaction level operation;The monitor has the function of automatic comparison and output of right and wrong,and completes the automatic comparison of the verification platform with the reference model.In order to ensure the completeness and correctness of the verification,this paper uses a well-designed verification platform to perform image processing from basic resource testing,functional function testing,image processing unit internal module functional testing,abnormal testing,and boundary testing.Based on the verification strategy,the above five types of test cases are designed and programmed.The basic resource tests can be used to test basic units such as SRAM and register units.Functional function tests can be used to test the supported Open GL function functions.The internal module function tests of the image processing unit are available.To test the function(enable and operate mode)of each module inside the image processing unit,abnormal test can be used to test abnormal scenes,and boundary test can be used to test critical scenes.After the simulation of all test cases was completed and passed,the coverage rate was collected by regression test batch simulation,and the coverage rate was over 95%,which met the verification requirements.Finally,the verification platform collects the processed images and compares them with the images before processing.This not only makes it easy to detect bugs and changes,but also evaluates the design effects.This paper proposes a verification method based on System Verilog image processing unit,and proves that the verification method is feasible.It also provides a solution for the functional verification of large data,multi-function and unobservable DUT such as the image processing unit system verification.