Neuromorphic Network Circuits Based On Resistive RAM

As the Artificial Intelligence develops,Neural Networks are used in visual recognition,autopilot and many other scenes.The fast progress of neural networks demands much higher quality of hardware.However in traditional computing system,data input and output speed significantly limits the computing speed and costs a large power consumption.Therefore many specific circuits are designed to overcome these shortcomings.RRAM as a fast speed and low power consumption device has drawn the attention.Its analog resistance can be used to store the weights of networks and its array can be used to be computing unit of the network.Taking its advantages some one layer networks have been designed to recognize simple images.In this work,a two layer perceptron network circuit design based on RRAM arrays has been introduced.This chip is designed to recognize handwriting numbers,consisting of two networks which the scales are 784*100 and 100*10.In the network a positive RRAM and a negative RRAM together make up a weight so the network in this chip is composed of 15.8K RRAMs.As the synapse connect to the neuron,the output of RRAM array is connected to the neuron circuit.To realize parallel computing,outputs of first array connect 100 neuron circuits in parallel and the second array connects to 10.Integrator circuits is used in this neuron to generate analog voltage from output current.Then this voltage is compared with the output of DAC,realizing the ReLU function in the same time.Finally a sequence of puls es is generated and the number of pulses is the digital voltage converted from the analog voltage.After the forward processing of networks,Error Back Propagation algorithm is applied to update the weights.The error between output of networks and the target value will be calculate,then the error applied to the output of second array as input value.Results from the second array is actually the error of the first array.Once the input,output and errors of both layers are ready,each RRAM's update operation is defined.Then the RRAMs will be SET or RESET by the results.After the design of circuits and layouts,this chip is manufactured.A hardware system consists of FPGA and Power Board is prepared for testing and some of the chip's basic functions are proved to be right.