Research And Design Of Analog Circuit Based On RRAM

With the development of the Big Data Era,the storage of data is facing a great innovation.Data storage can not be separated from memory and therefore memory,which is an important part of semiconductor industries,has also gets a rapid development.In most recent years,the popularity of protable devices,results in the requirements for non-volatile memory become more and more strict in the storage capacity,size,speed,power consumption and cost.However,the traditional non-volatile memory such as flash memory,has encountered bottlenecks in 22nm CMOS technology node,so it is difficult to make breakthroughts in integration,power consumption,endurance and speed.Seeking a new non-volatile memory has become a global hot spot.Resistive Random Access Memory(RRAM)is widely regarded as the most promising next-generation non-volatile memory owing to its distinct advantages of low power consumption,small device size,fast reading and writing,high durability and compatibility with trditional CMOS processes.Nevertheless,there are still a lot of problems in the RRAM.For example,ambiguous resistive switching mechanism,the lack of device model,read-write disturbance,poor probability because of the requirement for multi-power,all those issues need to be solved urgently.In this thesis,the related concepts of the RRAM are introduced in detail firstly,and the main problems of the RRAM are summarized.Then,for the problems that can be solved by the analog circuit,the corresponding solutions are proposed.Specifically,a Low-Dropout Regulator(LDO)power management module is designed according to the requirement of multiple operation voltages in the RRAM.The circuit design is based on SMIC 180nm dual power supply(1.8V,3.3V)CMOS process,the output voltages of LDO are 1.2V,2.0V and 2.5V.A single-ended sensitive readout circuit based on current mirror is designed according to the characteristic of single-ended readout in the RRAM.A low temperature drift bandgap reference source is designed according to the requirement of reference voltage in the LDO and the readout circuits.A universal SPICE model with adjustable parameters is designed for the lack of device model.Finally,the layout of each circuit is designed and the post-simulation is completed,the SPICE model is simulated and the simulation results are compared with the test results of the device.All the simulation results show that,in the bandgap reference voltage circuit,the temperature drift coefficient is less than 20ppm/? the power supply rejection ratio(PSRR)is greater than 70dB,and the phase margin is 73°.In the LDO circuit with output voltage of 1.2V,the maximum load current is 96mA,the load adjustment rate is 0.067%,the linear adjustment rate is 0.084%,the PSRR is greater than 70dB,and the phase margin is 60°.The SPICE model can be used to do the simulation of the system circuit.