The Virtualization Technology Of Hardware Resources Of FPGA Based On PCI Bus

The virtualization of FPGA hardware resources based on PCI bus refers to the use of PCI bus to configure the FPGA program,and to use a FPGA chip,according to the area of hardware resources,Virtual small FPGAs can be reconfigurable independently in order to reorganize devices flexibly.This research includes two key technologies: FPGA multiwaveform configuration technology based on PCI bus and FPGA dynamic reconfiguration technologyThe FPGA multi-waveform configuration technology based on PCI bus is to use PCI bus to simulate the signal timing relation of SELECT-MAP configuration of FPGA,and to configure FPGA in multiple versions.According to the host computer monitoring software settings,select the appropriate program file.The dynamic partial reconfiguration of FPGA allows on-the-fly dynamic reconfiguration of part of the logic resources in FPGA to finish the function transformation?With great advantages in system fault tolerance,aeronautics and astronautics,evolvable hardware,multi-function instrument and many other fields,this technology have wide application prospects in the future.In view of this,it has great value and practical significance to do research on FPGA dynamic reconfiguration technology and its application.Therefore,it can improve the integrations and flexibility and the tolerance of error of the system.With analyzing the FPGA dynamic reconfigure technology's current development and application in the world,this paper has done much research on its principle and implementation methods,and described their differences of realization method between main FPGA manufactures.Additionally,it can reduce the cost and the power consumption of the system.This paper designs a novel method to implement FPGA dynamic configuration through PCI bus interface of Industrial Personal Computer.This method can configure FPGA dynamically and carry out software-based configuration in the entire process of loading FPGA program.Then according to the requirements of the design this paper have done the hardware resources selection and make the most appropriate working mode,through the analysis of the program configuration process.Using the ISE integrated development environment,using the VHDL hardware description language,the logic functions implemented by the FPGA 400 and the target FPGA are described successively.Then,a comprehensive netlist file is generated for each function module of the target FPGA,and a bitstream file is generated by using the PlanAhead layout and wiring.Finally,through the upper computer software operation,the bit stream file is loaded onto the target FPGA to realize the designed logic function,and the result is analyzed.