Research On Online Evolution Technology Of Digital System Based On Dynamic Partial Reconfiguration Of FPGA

Evolvable Hardware(EHW), the integration of programmable logic device and Evolutionary Algorithm(EA), can change its own structure and behavior to adapt to the new environment. Currently, most of the EHW research works are focused on the self-evolving hardware based on System On a Programmable Chip(SOPC), which implements the reconfigurable circuit and EA on the same FPGA. Moreover, modern SRAM-based FPGAs are capable of Dynamic Partial Reconfiguration(DPR), so they enable real-time online modification of the partial modules' configuration to adjust the structure and function of the circuit. To solve the problems of huge area overhead and circuit delay in EHW based on Virtual Reconfigurable Circuit, technology of FPGA's DPR is applied to EHW to implement online evolution.The main research works are as follow:(1) The related works and problems of EHW are analysed, and EAPR is selected to implement EHW according to the analysis of different DPR technology. The experimental platform Xilinx Virtex-5 FPGA development board named ML507 and development environment are introduced.(2)With soft core processor taken as the self-reconfiguration controller, a self-reconfiguration system based on FPGA's DPR is designed, including the pre-design of reconfigurable modules, construction of hardware platform of SOPC, customization of reconfigurable IP core, design of software, generation of operator core bitstream library, etc; then the feasibility of the system's self-reconfiguration is verified with the arithmetic operation taken as an example.(3) The circuit structure of self-reconfigurable IP core is extended and modified to customize an evolvable IP core, and the EA runs on the reconfiguration engine, thus an online evolving digital system based on FPGA's DPR is designed; feasibility of system's self-evolution is verified with the polynomial computation taken as an example.(4)The on-line evolution of image filter is taken as a study case to explore the online evolving technologies, such as the acquisition of input data, the storage of the output data, etc. ROM IP cores are customized to save the data of images; and more operator cores are added to the bitstream library; moreover, the way to chromosome coding is modified; then fitness evaluation mechanism is proposed; at last, experiments are conducted to filter different types of image noise.