High Speed And High Precision Current Steering Digital-to-Analog Converter

Digital to Analog Converter(DAC)is used to convert digital signal to analog signal and has a wide range of applications in wireless communication,computer systems and image processing.The accuracy and speed of digital-to-analog converters are the core indicators of their performance.Therefore,the research on high-peed and high-precision digital-to-analog converters is of great significance and far-reaching impact.This paper analyzes and compares the advantages and disadvantages of DAC with different structures and discusses non-ideal factors that limit the performance of DAC,such as linearity,matching error,limited output impedance and so on.Current-steering architecture may be the most suitable DAC architecture because it is inherently fast and can drive resistive load without using output buffer.This paper designs a 14 bit resolution,2 GHz sampling current-steering DAC,its circuit includes low-voltage differential signal(LVDS)interface,a thermometer decoder,a switch driver,a switch array and a current source matrix.The DAC is segmented as 5+9,where the 5-MSB bits are implemented in unary architecture and 9-LSB bits are implemented in binary architecture.The current source array utilizes the random switching scheme to suppress the graded error and symmetrical error caused by process or thermal gradient.In addition,the DAC's dynamic performance is enhanced by adopting a digital pre-distortion algorithm.The DAC has been fabricated in TSMC 65 nm CMOS technology and uses an analog supply of 2.0 V and a digital supply of 1.3 V.Through the optimization of the switch drive circuit and the current source circuit,the dynamic performance of the DAC is improved.The measured spurious free dynamic range(SFDR)before and after enabling pre-distortion scheme improves from 63.8 dBc to 70.0 dBc at 240 MHz output signal.The DAC occupies an active area of 0.19 mm2 and consumes a total power of 490 mW from 1.3 V and 2.0 V supply.